IEICE TRANSACTIONS on Fundamentals
Switched Diffusion Analog Memory for Neural Networks with Hebbian Learning Function and Its Linear Operation
Summary :
We have fabricated a new analog memory for integrated artificial neural networks. Several attempts have been made to develop a linear characteristics of floating-gate analog memorys with feedback circuits. The learning chip has to have a large number of learning control circuit. In this paper, we propose a new analog memory SDAM with three cascaded TFTs. The new analog memory has a simple design, a small area occupancy, a fast switching speed and an accurate linearity. To improve accurate linearity, we propose a new chargetransfer process. The device has a tunnel junction (poly-Si/poly-Si oxide/poly-Si sandwich structure), a thin-film transistor, two capacitors, and a floating-gate MOSFET. The diffusion of the charges injected through the tunnel junction are controlled by a source follower operation of a thin film transistor (TFT). The proposed operation is possible that the amounts of transferred charges are constant independent of the charges in storage capacitor.
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- IEICE TRANSACTIONS on Fundamentals Vol.E79-A No.6 pp.746-751
- Publication Date
- 1996/06/25
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- Online ISSN
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- Special Section PAPER (Special Section of Papers Selected from 1995 Joint Technical Conference on Circuits/Systems, Computers and Communications (JTC-CSCC '95))
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Hyosig WON, Yoshihiro HAYAKAWA, Koji NAKAJIMA, Yasuji SAWADA, "Switched Diffusion Analog Memory for Neural Networks with Hebbian Learning Function and Its Linear Operation" in IEICE TRANSACTIONS on Fundamentals,
vol. E79-A, no. 6, pp. 746-751, June 1996, doi: .
Abstract: We have fabricated a new analog memory for integrated artificial neural networks. Several attempts have been made to develop a linear characteristics of floating-gate analog memorys with feedback circuits. The learning chip has to have a large number of learning control circuit. In this paper, we propose a new analog memory SDAM with three cascaded TFTs. The new analog memory has a simple design, a small area occupancy, a fast switching speed and an accurate linearity. To improve accurate linearity, we propose a new chargetransfer process. The device has a tunnel junction (poly-Si/poly-Si oxide/poly-Si sandwich structure), a thin-film transistor, two capacitors, and a floating-gate MOSFET. The diffusion of the charges injected through the tunnel junction are controlled by a source follower operation of a thin film transistor (TFT). The proposed operation is possible that the amounts of transferred charges are constant independent of the charges in storage capacitor.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e79-a_6_746/_p
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@ARTICLE{e79-a_6_746,
author={Hyosig WON, Yoshihiro HAYAKAWA, Koji NAKAJIMA, Yasuji SAWADA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Switched Diffusion Analog Memory for Neural Networks with Hebbian Learning Function and Its Linear Operation},
year={1996},
volume={E79-A},
number={6},
pages={746-751},
abstract={We have fabricated a new analog memory for integrated artificial neural networks. Several attempts have been made to develop a linear characteristics of floating-gate analog memorys with feedback circuits. The learning chip has to have a large number of learning control circuit. In this paper, we propose a new analog memory SDAM with three cascaded TFTs. The new analog memory has a simple design, a small area occupancy, a fast switching speed and an accurate linearity. To improve accurate linearity, we propose a new chargetransfer process. The device has a tunnel junction (poly-Si/poly-Si oxide/poly-Si sandwich structure), a thin-film transistor, two capacitors, and a floating-gate MOSFET. The diffusion of the charges injected through the tunnel junction are controlled by a source follower operation of a thin film transistor (TFT). The proposed operation is possible that the amounts of transferred charges are constant independent of the charges in storage capacitor.},
keywords={},
doi={},
ISSN={},
month={June},}
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TY - JOUR
TI - Switched Diffusion Analog Memory for Neural Networks with Hebbian Learning Function and Its Linear Operation
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 746
EP - 751
AU - Hyosig WON
AU - Yoshihiro HAYAKAWA
AU - Koji NAKAJIMA
AU - Yasuji SAWADA
PY - 1996
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E79-A
IS - 6
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - June 1996
AB - We have fabricated a new analog memory for integrated artificial neural networks. Several attempts have been made to develop a linear characteristics of floating-gate analog memorys with feedback circuits. The learning chip has to have a large number of learning control circuit. In this paper, we propose a new analog memory SDAM with three cascaded TFTs. The new analog memory has a simple design, a small area occupancy, a fast switching speed and an accurate linearity. To improve accurate linearity, we propose a new chargetransfer process. The device has a tunnel junction (poly-Si/poly-Si oxide/poly-Si sandwich structure), a thin-film transistor, two capacitors, and a floating-gate MOSFET. The diffusion of the charges injected through the tunnel junction are controlled by a source follower operation of a thin film transistor (TFT). The proposed operation is possible that the amounts of transferred charges are constant independent of the charges in storage capacitor.
ER -
English
