Optimized Software Implementations of E2
Summary :
This letter describes several techniques for optimizing software implementations of E2 on various platforms. We propose optimization techniques for each part of E2; a new inversion algorithm, efficient byte splitting and merging for BP-Function, and an efficient SPN (Substitution-Permutation Network) implementation for 32- or 64-bit processors. As a result, E2 achieves the encryption speeds of 100.5 kb/s, 68.3 Mb/s, 162.3 Mb/s, and 130.8 Mb/s for H8/300 (5 MHz), Pentium Pro (200 MHz), Pentium II (450 MHz), and 21164A (600 MHz).
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E83-A No.1 pp.101-105
- Publication Date
- 2000/01/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section LETTER (Special Section on Cryptography and Information Security)
- Category
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Kazumaro AOKI, Hiroki UEDA, "Optimized Software Implementations of E2" in IEICE TRANSACTIONS on Fundamentals,
vol. E83-A, no. 1, pp. 101-105, January 2000, doi: .
Abstract: This letter describes several techniques for optimizing software implementations of E2 on various platforms. We propose optimization techniques for each part of E2; a new inversion algorithm, efficient byte splitting and merging for BP-Function, and an efficient SPN (Substitution-Permutation Network) implementation for 32- or 64-bit processors. As a result, E2 achieves the encryption speeds of 100.5 kb/s, 68.3 Mb/s, 162.3 Mb/s, and 130.8 Mb/s for H8/300 (5 MHz), Pentium Pro (200 MHz), Pentium II (450 MHz), and 21164A (600 MHz).
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e83-a_1_101/_p
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@ARTICLE{e83-a_1_101,
author={Kazumaro AOKI, Hiroki UEDA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Optimized Software Implementations of E2},
year={2000},
volume={E83-A},
number={1},
pages={101-105},
abstract={This letter describes several techniques for optimizing software implementations of E2 on various platforms. We propose optimization techniques for each part of E2; a new inversion algorithm, efficient byte splitting and merging for BP-Function, and an efficient SPN (Substitution-Permutation Network) implementation for 32- or 64-bit processors. As a result, E2 achieves the encryption speeds of 100.5 kb/s, 68.3 Mb/s, 162.3 Mb/s, and 130.8 Mb/s for H8/300 (5 MHz), Pentium Pro (200 MHz), Pentium II (450 MHz), and 21164A (600 MHz).},
keywords={},
doi={},
ISSN={},
month={January},}
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TY - JOUR
TI - Optimized Software Implementations of E2
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 101
EP - 105
AU - Kazumaro AOKI
AU - Hiroki UEDA
PY - 2000
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E83-A
IS - 1
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - January 2000
AB - This letter describes several techniques for optimizing software implementations of E2 on various platforms. We propose optimization techniques for each part of E2; a new inversion algorithm, efficient byte splitting and merging for BP-Function, and an efficient SPN (Substitution-Permutation Network) implementation for 32- or 64-bit processors. As a result, E2 achieves the encryption speeds of 100.5 kb/s, 68.3 Mb/s, 162.3 Mb/s, and 130.8 Mb/s for H8/300 (5 MHz), Pentium Pro (200 MHz), Pentium II (450 MHz), and 21164A (600 MHz).
ER -
English
