IEICE TRANSACTIONS on Fundamentals
Low Voltage Analog Circuit Design Techniques: A Tutorial
Summary :
Low voltage (LV) analog circuit design techniques are addressed in this tutorial. In particular, (i) technology considerations; (ii) transistor model capable to provide performance and power tradeoffs; (iii) low voltage implementation techniques capable to reduce the power supply requirements, such as bulk-driven, floating-gate, and self-cascode MOSFETs; (iv) basic LV building blocks; (v) multi-stage frequency compensation topologies; and (vi) fully-differential and fully-balanced systems.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E83-A No.2 pp.179-196
- Publication Date
- 2000/02/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section INVITED PAPER (Special Section on Analog Circuit Techniques and Related Topics)
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Shouli YAN, Edgar SANCHEZ-SINENCIO, "Low Voltage Analog Circuit Design Techniques: A Tutorial" in IEICE TRANSACTIONS on Fundamentals,
vol. E83-A, no. 2, pp. 179-196, February 2000, doi: .
Abstract: Low voltage (LV) analog circuit design techniques are addressed in this tutorial. In particular, (i) technology considerations; (ii) transistor model capable to provide performance and power tradeoffs; (iii) low voltage implementation techniques capable to reduce the power supply requirements, such as bulk-driven, floating-gate, and self-cascode MOSFETs; (iv) basic LV building blocks; (v) multi-stage frequency compensation topologies; and (vi) fully-differential and fully-balanced systems.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e83-a_2_179/_p
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@ARTICLE{e83-a_2_179,
author={Shouli YAN, Edgar SANCHEZ-SINENCIO, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Low Voltage Analog Circuit Design Techniques: A Tutorial},
year={2000},
volume={E83-A},
number={2},
pages={179-196},
abstract={Low voltage (LV) analog circuit design techniques are addressed in this tutorial. In particular, (i) technology considerations; (ii) transistor model capable to provide performance and power tradeoffs; (iii) low voltage implementation techniques capable to reduce the power supply requirements, such as bulk-driven, floating-gate, and self-cascode MOSFETs; (iv) basic LV building blocks; (v) multi-stage frequency compensation topologies; and (vi) fully-differential and fully-balanced systems.},
keywords={},
doi={},
ISSN={},
month={February},}
Copy
TY - JOUR
TI - Low Voltage Analog Circuit Design Techniques: A Tutorial
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 179
EP - 196
AU - Shouli YAN
AU - Edgar SANCHEZ-SINENCIO
PY - 2000
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E83-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 2000
AB - Low voltage (LV) analog circuit design techniques are addressed in this tutorial. In particular, (i) technology considerations; (ii) transistor model capable to provide performance and power tradeoffs; (iii) low voltage implementation techniques capable to reduce the power supply requirements, such as bulk-driven, floating-gate, and self-cascode MOSFETs; (iv) basic LV building blocks; (v) multi-stage frequency compensation topologies; and (vi) fully-differential and fully-balanced systems.
ER -
English
