This paper proposes a realization of power factor function generator having an arbitrary base and power factor which are determined by the ratios of the currents provided from outside of the circuit. The circuit characteristics do not depend on any transistor parameters, temperature, and other environmental conditions. The circuit operation is based on current mode that has a capability of low power supply voltage operation below than 2.0 V. SPICE simulation has been carried out using 0.7 µm BiCMOS parameters and shows quite good transfer characteristics.

Low voltage (LV) analog circuit design techniques are addressed in this tutorial. In particular, (i) technology considerations; (ii) transistor model capable to provide performance and power tradeoffs; (iii) low voltage implementation techniques capable to reduce the power supply requirements, such as bulk-driven, floating-gate, and self-cascode MOSFETs; (iv) basic LV building blocks; (v) multi-stage frequency compensation topologies; and (vi) fully-differential and fully-balanced systems.

An OTA without a tail-current source is proposed for low power supply voltages. Only two MOSFET's are connected between power supply lines in order to operate under low power supply voltages. A few MOSFET's are added at the expense of eliminating the tail-current source of the conventional OTA. SPICE simulation is shown in order to evaluate the proposed circuits. As an application, a low-pass filter is realized by employing the proposed OTA's.

A tail current source is often employed for many analog building blocks. It can limit the increase of excess power. It can also improve CMRR and PSRR. In this paper, we propose a very high output impedance tail current source for low voltage applications. The proposed tail current source has almost the same output impedance as the conventional cascode type tail current source in theory. Simulation results show that the output impedance of the proposed circuit becomes 1.28 GW at low frequencies. Applying the proposed circuit to a differential amplifier, the CMRR is enhanced by 66.7 dB, compared to the conventional differential amplifier. Moreover, the proposed circuit has the other excellent merit. The output stage of the proposed tail current source can operate at V_DS(sat) and a quarter of V_DS(sat) of the simple current source in theory and simulation, respectively. For example, in the simulation, when the reference current I_REF is set to 100µA, the minimum voltage of the simple current source approximates 0.4 V, whereas that of the proposed current source approximates 0.1 V. Thus, the dynamic range can be enlarged by 0.3 V in this case. The value is still enough large value for low voltage applications. Hence, the proposed tail current source is suitable for low voltage applications.

This paper presents a 7th-order channel-select filter for a spread-spectrum wireless receiver operating with a minimum power supply of 2.5 V. The channel-select filter implements a sharp transition from 2 MHz to 4 MHz and a stopband attenuation of 50 dB. The 7th-order filter is realized by a cascade of a passive RC integrator, a 3rd-order leapfrog filter, an operational amplifier based differentiator, a 2nd-order notch filter, and a 1st-order allpass filter. It is designed in a 0.35 µm single-poly BiCMOS process. Simulation results show feasibility of the proposed filter.

This paper describes a sub 1-V low noise amplifier (LNA) fabricated using a 0.35 µm SOI (silicon on insulator) CMOS process. The SOI devices have high speed performance even at low operating voltage (below 1 V) because of their smaller parasitic capacitance at source and drain than those of bulk MOSs. A body of a MOSFET can be controlled by using a field shield (FS) plate. The transistor body of the LNA is connected to its gate. The threshold voltage of the transistor becomes lower due to the body-biased effect so that a large drain current keeps the gain high, and active-body control improves the 1-dB gain compression point. A gain of 7.0 dB and a Noise Figure (NF) of 3.6 dB are obtained at 1.0 V and 1.9 GHz. The output power at the 1-dB gain compression point is +1.5 dBm. The gain and the output power at the 1-dB gain compression point are higher by 1.2 dB and 2.9 dB respectively than those of a conventionally body-fixed LNA. A 5.5 dB gain is also obtained at the supply voltage of 0.5 V.

This paper proposes an improved nonlinear FET model along with its parameter extraction procedure suitable for the accurate prediction of inter-modulation product's levels (IM) and spurious responses in active and passive applications. This new model allows accurate capture of the drain current behavior and its derivatives with respect to the gate voltage and the drain voltage in the both the saturated and linear regions of the I-V biasing domain. It was found that this model accurately predicts the bias-dependent S-parameters as well as IM's levels for both amplifier and mixer applications up to mm-wave frequencies.

A lower impedance terminal is necessary for an input terminal of current-mode circuits and an output terminal of voltage-mode circuits to reduce an error and distortion in analog signal processing. Thus, the CMOS circuit with a very low impedance terminal (VLIT circuit) is a useful analog building block to achieve the above purpose. The very low impedance terminal in the VLIT circuit is performed by a shunt-series feedback configuration. However, the feedback generates a problem of instability and/or oscillation at the same time. The problem can be removed by a phase compensation capacitor as known well, but the capacitor is not desirable for integrated circuits due to its large area. This paper proposes a new phase compensation technique for the VLIT circuit. The proposed technique does not need any capacitors to obtain a sufficient phase margin, and instead gives us the appropriate transistor sizes (Width and length of the gate). As a result, the VLIT circuit has an enough phase margin and operates stably.

A 24-bit, 96 kHz stereo A/D converter (ADC) for DVD-audio has been developed. The single-chip integrates stereo delta-sigma modulators (Δ ΣM's), a voltage reference, and a decimation filter. A fourth-order cascaded Δ ΣM using a local feedback technique was employed to avoid overload without sacrificing noise performance. Low power switched-capacitor techniques were used for implementation. A two-stage decimation filter architecture that reduces digital switching noise was also developed. A merged multi-stage comb filter was used for the first stage, and a bit-serial finite-impulse-response (FIR) filter was used for the second stage. The 18.0 mm² chip was fabricated in 0.6-µm CMOS with low threshold devices. Measured results show 117 dB A-weighted dynamic range in the 20 kHz passband, with 470 mW power dissipation at 5 V operation.

An analog standard cell layout configuration is proposed for simplifying the design and reducing the man-hours for designing mixed analog-digital LSIs, and analog standard cells are fabricated for A-D and D-A converters with Δ-Σ modulators. This works seeks to implement 2-D cell placement with up-down and left-right mirror rotation and shorter high-impedance analog wiring than conventional 1-D placement in order to obtain high-performance analog characteristics. By considering sensitivity to noise, routing channels have been classified into 4 types: high-impedance analog, low-impedance analog, analog-digital, and digital, and efforts have been made to prevent analog wires from crossing over digital wires. In addition to power and analog ground wires, analog standard cells have built-in analog ground wires with attached wells optimized for shielding. These wires are interconnected to a new isolation cell that separates analog circuits from digital circuits and routing channels. Based on the above layout structure, 46 different types of analog standard cells have been designed. Also, the analog part of Δ-Σ type A-D and D-A converters can be automatically designed in conjunction with interactive processing and chips fabricated by using these cells. It was found that, compared to manual design, one could easily obtain a chip occupying less than 1.5-times the area with about 2/3 the man-days using this approach. In comparison with manual design, it was also found that the S/N ratio could be reduced from about 6 to 7 dB.

Based on a cascode-driver source-follower buffer, and a passive sampling architecture, we have implemented a differential sample-and-hold circuit in a 0.8 µm digital CMOS process. The buffer which eliminates channel length modulation of the driver device behaves very linearly, in low frequencies or sampled-data applications. This is the main reason that this first open-loop CMOS sample-and-hold can achieves very high linearity while functions at very high sampling rate. The circuit achieved -61 dB THD for a 1.42 V_p-p 10 MHz input signal at a 103 MHz sampling rate and -55.9 dB THD for a 1.22 V_p-p 20 MHz at a 101 MHz sampling rate.

This paper describes a dual-looped PLL architecture to improve voltage-to-frequency linearity of VCO. The V-I converter employing a current-pumping algorithm is proposed to enhance the linearity of the VCO circuit. The designed VCO operates at a wide frequency range of 75.8 MHz-1 GHz with a good linearity. The PFD circuit design technique preventing fluctuation of the charge pump circuit under the locked condition is discussed. Simulation results show that a locking time of the proposed PLL is 3.5 µs at 1 GHz and the power dissipation is 92 mW.

This paper describes a 270-MHz CMOS quadrature modulator (QMOD) for a global system for mobile communications (GSM) transmitter. QMOD consists of two attenuators and two doubly-balanced modulators (DBM's) and fabricated by using 0.35-µm CMOS process. The carrier leakage level of -35.7 dBc and the image rejection level of -45.1 dBc are achieved. It's total chip area is 880 µm550 µm and it consumes 1.0 mA with 3.0 V power supply.

It is proposed a novel method that optimizes nonlinear filters by unsupervised learning using a novel definition of morphological pattern spectrum, called "morphological opening/closing spectrum (MOCS)." The MOCS can separate smaller portions of image objects from approximate shapes even if the shapes are degraded by noisy pixels. Our optimization method analogizes the linear low-pass filtering and Fourier spectrum: filter parameters are adjusted to reduce the portions of smaller sizes in MOCS, since they are regarded as the contributions of noises like high-frequency components. This method has an advantage that it uses only target noisy images and requires no example of ideal outputs. Experimental results of applications of this method to optimization of morphological open-closing filter for binary images are presented.

A nonlinear inverse filter is proposed for restoring signals degraded by a linear system and additive Gaussian noise. The proposed filter consists of combination of a linear high pass filter and an ε-filter, which is modified from the cascaded linear filter. The nonlinear property of the ε-filter is utilized to suppress pre-enhanced additive random noise and to restore sharp edges. It is demonstrated that the filter can be reduced to a multi-layered neural network model, and the optimal design is described by using the back propagation algorithm. The nonlinear function is approximated by a piecewise linear function, which results in simple and robust training algorithm. An application to image restoration is also presented, illustrating the effectiveness over the linear filter, especially when the amplitude of additive noise is small.

Fuzzy rule-based edge detection using multiscale edge images is proposed. In this method, the edge image is obtained by fuzzy approximate reasoning from multiscale edge images which are obtained by derivative operators with various window sizes. The effect of utilizing multiscale edge images for edge detection is already known, but how to design the rules for deciding edges from multiscale edge images is not clarified yet. In this paper, the rules are represented in a fuzzy style, since edges are usually defined ambiguously, and the fuzzy rules are designed optimally by a training method. Here, the fuzzy approximate reasoning is expressed as a nonlinear function of the multiscale edge image data, and the nonlinear function is optimized so that the mean square error of the edge detection be the minimum. Computer simulations verify its high performance for actual images.

This paper describes a unified coding algorithm for lossless and near-lossless color image compression that exploits the correlations between RGB signals. A reversible color transform that removes the correlations between RGB signals while avoiding any finite word length limitation is proposed for the lossless case. The resulting algorithm gives higher performance than the lossless JPEG without the color transform. Next, the lossless algorithm is extended to a unified coding algorithm of lossless and near-lossless compression schemes that can control the level of the reconstruction error on the RGB plane from 0 to p, where p is a certain small non-negative integer. The effectiveness of this algorithm was demonstrated experimentally.

This paper presents a new data hiding scheme via steganographic image transformation, which is different from conventional data hiding techniques. The transformation is achieved in the frequency domain and the concept of Fourier filtering method is used. An input image is transformed into a fractal image, which can be used in Computer Graphic (CG) applications. One of the main advantages of this scheme is the amount of data to be hidden (embedded) is equal to that of the host signal (generated fractal image) while it is in general limited in the conventional data hiding schemes. Also both the opened fractal image and the hidden original one can be properly used depending on the situation. Unauthorized users will not notice the "secret" original image behind the fractal image, but even if they know that there is a hidden image it will be difficult for them to estimate the original image from the transformed image. Only authorized users who know the proper keys can regenerate the original image. The proposed method is applicable not only as a security tool for multimedia contents on web pages but also as a steganographic secret communication method through fractal images.

In this paper, an algorithm of the median-cut quantization (MCQ) is proposed. MCQ is the technique that reduces multi-valued samples to binary-valued ones by adaptively taking the median value as the threshold. In this work, the search process of the median value is derived from the quick-sort algorithm. The proposed algorithm searches the median value bit by bit, and samples are quantized during the search process. Firstly, the bit-serial procedure is shown, and then it is modified to the bit-parallel procedure. The extension to the multi-level quantization is also discussed. Since the proposed algorithm is based on bit operations, it is suitable for hardware implementation. Thus, its hardware architecture is also proposed. To verify the significance, for the application to the motion estimation, the performance is estimated from the synthesis result of the VHDL model.

This paper proposes a nonlinear oscillator network model for gray-level image segmentation suitable for massively parallel VLSI implementation. The model performs image segmentation in parallel using nonlinear analog dynamics. Because of the limited calculation precision in VLSI implementation, it is important to estimate the calculation precision required for proper operation. By numerical simulation, the necessary precision is estimated to be 5 bits. We propose a nonlinear oscillator network circuit using the pulse modulation approach suitable for an analog-digital merged circuit architecture. The basic operations of the nonlinear oscillator circuit and the connection weight circuit are confirmed by SPICE circuit simulation. The circuit simulation results also demonstrate that image segmentation can be performed within the order of 100 µs.

In this paper, the waveforms measured by the strain gauge in the tapping test on a number of healthy subjects and patients with Parkinson's disease are analyzed with the objective of reaching a quantitatively evaluation of the associated symptom. It has been observed that the waveform of a patient with Parkinson's disease becomes more irregular as the symptom is getting more serious, while the waveform of a healthy subject is rather regular. In this study, the regularity of the waveform is evaluated by the so-called trajectory parallel measure. The results show a large difference in the trajectory parallel measure of the waveforms of healthy subjects vs. those of the Parkinson's disease patients. Furthermore, the trajectory parallel measure of Parkinson's disease patients can be quantitatively ranked to correlate to the degree of the symptom. This paper begins with a brief description about Parkinson's disease. The trajectory parallel measure is then introduced and applied to analysis of the waveforms of both healthy subjects and patients with Parkinson's disease. Illustrative results are shown to demonstrate the applicability of the proposed analysis methodology.

It is now known that a seemingly random irregular time series can be deterministic chaos (hereafter, chaos). However, there can be various kind of noise superimposed into signals from real systems. Other factors affecting a signal include sampling intervals and finite length of observation. Perhaps, there may be cases in which a chaotic time series is considered as noise. J. Theiler proposed a method of surrogating data to address these problems. The proposed method is one of a number of approaches for testing a statistical hypothesis. The method can identify the deterministic characteristics of a time series. In this approach, a surrogate data is formed to have stochastic characteristics with the statistic value associated with the original data. When the characteristics of the original data differs from that of a surrogate data, the null hypothesis is no longer valid. In other words, the original data is deterministic. In comparing the characteristics of an original time series data and that of a surrogate data, the maximum Lyapunov exponents, correlation dimensions and prediction accuracy are utilized. These techniques, however, can not calculate the structure in local subspaces on the attractor and the flow of trajectories. In deal with these issues, we propose the trajectory parallel measure (TPM) method to determine whether the null hypothesis should be rejected. In this paper, we apply the TPM method and the method of surrogate data to test a chaotic time series and a random time series. We also examine whether a practical time series has a deterministic property or not. The results demonstrate that the TPM method is useful for judging whether the original and the surrogate data sets are different. For illustration, the TPM method is applied to a practical time series, tap water demand data.

The genetic algorithm is used to synthesize the directional circular arc array as a sectored antenna. Then, the performance of this sectored antenna in indoor wireless millimeter wave channel is investigated. Based on the desired pattern and the topography of the antennas, the synthesis problem can be reformulated into an optimization problem and solved by the genetic algorithm. The genetic algorithm will always converge to global extreme instead of local extreme and achieves a good approximation to the desired pattern. Next, the impulse responses of the indoor channel for any transmitter-receiver location are computed by shooting and bouncing ray/image techniques. By using the impulse response of multipath channel, the performance of the sectored antenna on BPSK (binary phase shift keying) system with phase and timing recovery circuits is presented. Numerical results show that the synthesized sectored antenna is effective to combat the multipath fading and can increase the transmission rate of indoor millimeter wave system.

This paper deals with the prediction of stock trends by using the wavelet transform and the multi-stage fuzzy inference system based upon the optimization of membership function by using the GA. The system is expected to recognize the short-term feature which is usually used to estimate the rise/fall of price by human experts. In the prediction of stock prices, the wavelet transform is used to describe the short term feature of the stock trend. The fractal dimension and the variance of the time series are also used as the input variables. By dividing the inference system into multiple stages, the total number of rules is sufficiently depressed compared to the single stage system. In each stage of inference only a portion of input variables are used as the input, and output of the stage is treated as an input to the next stage. To give better performance, the shape of the membership function of the inference rules is optimized by using the GA. Each individual corresponds to an inference system, and its fitness is calculated as the ratio of the correct recognition. In the simulation study, we define the rise and fall of prices by considering the threshold value for the price change, and the interval of prediction. Then, the parameters of the system are adjusted by using the data for learning and the performance is evaluated by comparing the prediction and observation. The simulation study shows that the inference system gives about a 70% correct prediction of the price change of stocks. The result is compared to the prediction by the neural network, and we see better classification of the fuzzy system.

As the nonlinear adaptive filter, the neural filter is utilized to process the nonlinear signal and/or system. However, the neural filter requires large number of iterations for convergence. This letter presents a new structure of the multi-layer neural filter where the orthonormal transform is introduced into all inter-layers to accelerate the convergence speed. The proposed structure is called the transform domain neural filter (TDNF) for convenience. The weights are basically updated by the Back-Propagation (BP) algorithm but it must be modified since the error back-propagates through the orthogonal transform. Moreover, the variable step size which is normalized by the transformed signal power is introduced into the BP algorithm to realize the orthonormal transform. Through the computer simulation, it is confirmed that the introduction of the orthonormal transform is effective for speedup of convergence in the neural filter.

Recently, researchers in various fields have shown interest in the behavior of creatures from the viewpoint of adaptiveness and flexibility. Ants, known as social insects, exhibit collective behavior in performing tasks that can not be carried out by an individual ant. In ant colonies, chemical substances, called pheromones, are used as a way to communicate important information on global behavior. For example, ants looking for food lay the way back to their nest with a specific type of pheromone. Other ants can follow the pheromone trail and find their way to baits efficiently. In 1991, Colorni et al. proposed the ant algorithm for Traveling Salesman Problems (TSPs) by using the analogy of such foraging behavior and pheromone communication. In the ant algorithm, there is a colony consisting of many simple ant agents that continuously visit TSP cities with opinions to prefer subtours connecting near cities and they lay strong pheromones. The ants completing their tours lay pheromones of various intensities with passed subtours according to distances. Namely, subtours in TSP tourns that have the possibility of being better tend to have strong pheromones, so the ant agents specify good regions in the search space by using this positive feedback mechanism. In this paper, we propose a multiple ant colonies algorithm that has been extended from the ant algorithm. This algorithm has several ant colonies for solving a TSP, while the original has only a single ant colony. Moreover, two kinds of pheromone effects, positive and negative pheromone effects, are introduced as the colony-level interactions. As a result of colony-level interactions, the colonies can exchange good schemata for solving a problem and can maintain their own variation in the search process. The proposed algorithm shows better performance than the original algorithm with almost the same agent strategy used in both algorithms except for the introduction of colony-level interactions.

In this paper, we provide a bound of the continuous ARE solution in terms of a matrix associated with Lyapunov solutions. Based on the new matrix-type bound, we also consider various scalar bounds and compare them with existing bounds. The major advantage of our results over existing results is that the new bounds can be always obtained if the stabilizing solution exists, whereas all existing bounds might not be computed because they require other conditions additional to the existence condition.

In order to investigate the possibility of avatar communication using sign-language, in this paper, we develop a sign-language chatting system on the Internet using CG aniamtion techniques between Korea and Japan. We construct the system in server-client architecture, where images of Korean or Japanese sign-language are analyzed into a series of parameters for sign-language animation by server. We transmit the parameters, which are text data instead of images or their compression, to clients and regenerate the corresponding CG animation using the received data. The chatting system is implemented with Visual C++ 5.0 on Windows platforms. Experimental results show that the sign-language could be used as a communication means between avatars of different languages.