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A Nonlinear Oscillator Network for Gray-Level Image Segmentation and PWM/PPM Circuits for Its VLSI Implementation

Hiroshi ANDO, Takashi MORIE, Makoto NAGATA, Atsushi IWATA

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Summary :

This paper proposes a nonlinear oscillator network model for gray-level image segmentation suitable for massively parallel VLSI implementation. The model performs image segmentation in parallel using nonlinear analog dynamics. Because of the limited calculation precision in VLSI implementation, it is important to estimate the calculation precision required for proper operation. By numerical simulation, the necessary precision is estimated to be 5 bits. We propose a nonlinear oscillator network circuit using the pulse modulation approach suitable for an analog-digital merged circuit architecture. The basic operations of the nonlinear oscillator circuit and the connection weight circuit are confirmed by SPICE circuit simulation. The circuit simulation results also demonstrate that image segmentation can be performed within the order of 100 µs.

Publication
IEICE TRANSACTIONS on Fundamentals Vol.E83-A No.2 pp.329-336
Publication Date
2000/02/25
Publicized
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DOI
Type of Manuscript
Special Section PAPER (Special Section on Intelligent Signal and Image Processing)
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