PSK coherent demodulation has difficulty in achieving high speed carrier extraction and symbol synchronization when implementing to slow FH-SS radio system. On the other hand, implementation to FPGA has the requirement of a small gate size to design because of FPGA cost issue. We developed a QPSK coherent demodulation digital modem for FH-SS radio systems using FPGA by solving problems. The designed modem performs symbol synchronization with no carrier extractions, under the limitation of the small gate size requirement. The modem employs shift arithmetic operation and a comb digital BPF to achieve very good synchronization lock-up performance with small gate size. In this paper, the symbol synchronization and the carrier tracking scheme are mainly discussed. Analysis of its performance and stability are also explained. The achievement of its very good performance is presented by experimental measurement.
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Satoru ISHII, Atsushi HOSHIKUKI, Ryuji KOHNO, "Design of Simplified Coherent QPSK Modem for Frequency Hopping Spread Spectrum" in IEICE TRANSACTIONS on Fundamentals,
vol. E84-A, no. 12, pp. 2966-2975, December 2001, doi: .
Abstract: PSK coherent demodulation has difficulty in achieving high speed carrier extraction and symbol synchronization when implementing to slow FH-SS radio system. On the other hand, implementation to FPGA has the requirement of a small gate size to design because of FPGA cost issue. We developed a QPSK coherent demodulation digital modem for FH-SS radio systems using FPGA by solving problems. The designed modem performs symbol synchronization with no carrier extractions, under the limitation of the small gate size requirement. The modem employs shift arithmetic operation and a comb digital BPF to achieve very good synchronization lock-up performance with small gate size. In this paper, the symbol synchronization and the carrier tracking scheme are mainly discussed. Analysis of its performance and stability are also explained. The achievement of its very good performance is presented by experimental measurement.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e84-a_12_2966/_p
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@ARTICLE{e84-a_12_2966,
author={Satoru ISHII, Atsushi HOSHIKUKI, Ryuji KOHNO, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Design of Simplified Coherent QPSK Modem for Frequency Hopping Spread Spectrum},
year={2001},
volume={E84-A},
number={12},
pages={2966-2975},
abstract={PSK coherent demodulation has difficulty in achieving high speed carrier extraction and symbol synchronization when implementing to slow FH-SS radio system. On the other hand, implementation to FPGA has the requirement of a small gate size to design because of FPGA cost issue. We developed a QPSK coherent demodulation digital modem for FH-SS radio systems using FPGA by solving problems. The designed modem performs symbol synchronization with no carrier extractions, under the limitation of the small gate size requirement. The modem employs shift arithmetic operation and a comb digital BPF to achieve very good synchronization lock-up performance with small gate size. In this paper, the symbol synchronization and the carrier tracking scheme are mainly discussed. Analysis of its performance and stability are also explained. The achievement of its very good performance is presented by experimental measurement.},
keywords={},
doi={},
ISSN={},
month={December},}
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TY - JOUR
TI - Design of Simplified Coherent QPSK Modem for Frequency Hopping Spread Spectrum
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2966
EP - 2975
AU - Satoru ISHII
AU - Atsushi HOSHIKUKI
AU - Ryuji KOHNO
PY - 2001
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E84-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2001
AB - PSK coherent demodulation has difficulty in achieving high speed carrier extraction and symbol synchronization when implementing to slow FH-SS radio system. On the other hand, implementation to FPGA has the requirement of a small gate size to design because of FPGA cost issue. We developed a QPSK coherent demodulation digital modem for FH-SS radio systems using FPGA by solving problems. The designed modem performs symbol synchronization with no carrier extractions, under the limitation of the small gate size requirement. The modem employs shift arithmetic operation and a comb digital BPF to achieve very good synchronization lock-up performance with small gate size. In this paper, the symbol synchronization and the carrier tracking scheme are mainly discussed. Analysis of its performance and stability are also explained. The achievement of its very good performance is presented by experimental measurement.
ER -