CMOS Implementation of Neuron Models for an Artificial Auditory Neural Network
Summary :
In this paper, we propose the CMOS implementation of neuron models for an artificial auditory neural network. We show that when voltage is added directly to the control terminal of the basic circuit of the hardware neuron model, a change in the output firing is observed. Next, based on this circuit, a circuit that changes with time is added to the control terminal of the basic circuit of the hardware neuron model. As a result, a neuron model is constructed with ON firing, adaptation firing, and repetitive firing using CMOS. Furthermore, an improved circuit of a neuron model with OFF firing using CMOS which has been improved from the previous model is also constructed.
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- IEICE TRANSACTIONS on Fundamentals Vol.E86-A No.2 pp.424-427
- Publication Date
- 2003/02/01
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- Type of Manuscript
- Special Section LETTER (Special Section on Analog Circuit Techniques and Related Topics)
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Katsutoshi SAEKI, Yoshifumi SEKINE, "CMOS Implementation of Neuron Models for an Artificial Auditory Neural Network" in IEICE TRANSACTIONS on Fundamentals,
vol. E86-A, no. 2, pp. 424-427, February 2003, doi: .
Abstract: In this paper, we propose the CMOS implementation of neuron models for an artificial auditory neural network. We show that when voltage is added directly to the control terminal of the basic circuit of the hardware neuron model, a change in the output firing is observed. Next, based on this circuit, a circuit that changes with time is added to the control terminal of the basic circuit of the hardware neuron model. As a result, a neuron model is constructed with ON firing, adaptation firing, and repetitive firing using CMOS. Furthermore, an improved circuit of a neuron model with OFF firing using CMOS which has been improved from the previous model is also constructed.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e86-a_2_424/_p
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@ARTICLE{e86-a_2_424,
author={Katsutoshi SAEKI, Yoshifumi SEKINE, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={CMOS Implementation of Neuron Models for an Artificial Auditory Neural Network},
year={2003},
volume={E86-A},
number={2},
pages={424-427},
abstract={In this paper, we propose the CMOS implementation of neuron models for an artificial auditory neural network. We show that when voltage is added directly to the control terminal of the basic circuit of the hardware neuron model, a change in the output firing is observed. Next, based on this circuit, a circuit that changes with time is added to the control terminal of the basic circuit of the hardware neuron model. As a result, a neuron model is constructed with ON firing, adaptation firing, and repetitive firing using CMOS. Furthermore, an improved circuit of a neuron model with OFF firing using CMOS which has been improved from the previous model is also constructed.},
keywords={},
doi={},
ISSN={},
month={February},}
Copy
TY - JOUR
TI - CMOS Implementation of Neuron Models for an Artificial Auditory Neural Network
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 424
EP - 427
AU - Katsutoshi SAEKI
AU - Yoshifumi SEKINE
PY - 2003
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E86-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 2003
AB - In this paper, we propose the CMOS implementation of neuron models for an artificial auditory neural network. We show that when voltage is added directly to the control terminal of the basic circuit of the hardware neuron model, a change in the output firing is observed. Next, based on this circuit, a circuit that changes with time is added to the control terminal of the basic circuit of the hardware neuron model. As a result, a neuron model is constructed with ON firing, adaptation firing, and repetitive firing using CMOS. Furthermore, an improved circuit of a neuron model with OFF firing using CMOS which has been improved from the previous model is also constructed.
ER -
English
