IEICE TRANSACTIONS on Fundamentals
A Versatile CMOS Analog Multiplier
Summary :
This paper describes a novel four-quadrant analog multiplier. It is comprised of two mixed signal circuits, a voltage adder circuit, a voltage divider circuit and a basic multiplier. Its major advantages over the other analog multipliers are: this design has single ended inputs, the geometry of all CMOS transistors are equal, and its output can be the product of two signal currents, the product of two signal voltages, or the product of a signal current and a signal voltage. Second-order effects are analyzed, and the experimental and simulative results that confirm the theoretical analysis are carried out.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E86-A No.5 pp.1225-1232
- Publication Date
- 2003/05/01
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- PAPER
- Category
- Analog Signal Processing
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Ittipong CHAISAYUN, Kobchai DEJHAN, "A Versatile CMOS Analog Multiplier" in IEICE TRANSACTIONS on Fundamentals,
vol. E86-A, no. 5, pp. 1225-1232, May 2003, doi: .
Abstract: This paper describes a novel four-quadrant analog multiplier. It is comprised of two mixed signal circuits, a voltage adder circuit, a voltage divider circuit and a basic multiplier. Its major advantages over the other analog multipliers are: this design has single ended inputs, the geometry of all CMOS transistors are equal, and its output can be the product of two signal currents, the product of two signal voltages, or the product of a signal current and a signal voltage. Second-order effects are analyzed, and the experimental and simulative results that confirm the theoretical analysis are carried out.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e86-a_5_1225/_p
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@ARTICLE{e86-a_5_1225,
author={Ittipong CHAISAYUN, Kobchai DEJHAN, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Versatile CMOS Analog Multiplier},
year={2003},
volume={E86-A},
number={5},
pages={1225-1232},
abstract={This paper describes a novel four-quadrant analog multiplier. It is comprised of two mixed signal circuits, a voltage adder circuit, a voltage divider circuit and a basic multiplier. Its major advantages over the other analog multipliers are: this design has single ended inputs, the geometry of all CMOS transistors are equal, and its output can be the product of two signal currents, the product of two signal voltages, or the product of a signal current and a signal voltage. Second-order effects are analyzed, and the experimental and simulative results that confirm the theoretical analysis are carried out.},
keywords={},
doi={},
ISSN={},
month={May},}
Copy
TY - JOUR
TI - A Versatile CMOS Analog Multiplier
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1225
EP - 1232
AU - Ittipong CHAISAYUN
AU - Kobchai DEJHAN
PY - 2003
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E86-A
IS - 5
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - May 2003
AB - This paper describes a novel four-quadrant analog multiplier. It is comprised of two mixed signal circuits, a voltage adder circuit, a voltage divider circuit and a basic multiplier. Its major advantages over the other analog multipliers are: this design has single ended inputs, the geometry of all CMOS transistors are equal, and its output can be the product of two signal currents, the product of two signal voltages, or the product of a signal current and a signal voltage. Second-order effects are analyzed, and the experimental and simulative results that confirm the theoretical analysis are carried out.
ER -
English
