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Advance publication (published online immediately after acceptance)

Volume E86-A No.5  (Publication Date:2003/05/01)

    Special Section on Discrete Mathematics and Its Applications
  • FOREWORD

    Hiro ITO  

     
    FOREWORD

      Page(s):
    977-977
  • Determination of All Convex Polygons which are Chameleons--Congruent Dudeney Dissections of Polygons--

    Jin AKIYAMA  Gisaku NAKAMURA  

     
    INVITED PAPER

      Page(s):
    978-986

    Let α and β be polygons with the same area. A Dudeney dissection of α to β is a partition of α into parts which can be reassembled to produce β in the following way. Hinge the parts of α like a chain along the perimeter of α, then fix one of the parts and without turning the pieces over, rotate the remaining parts about the fixed part to form β in such a way that the entire perimeter of α is in the interior of β and the perimeter of β consists of the dissection lines formerly in the interior of α . In this paper we discuss a special type of Dudeney dissection of convex polygons in which α is congruent to β and call it a congruent Dudeney dissection. In particular, we consider the case where all hinge points are interior to the sides of the polygon α. A convex polygon which has a congruent Dudeney dissection is called a chameleon. We determine all convex polygons which are chameleons.

  • Digital Curve Approximation with Length Evaluation

    Tetsuo ASANO  Yasuyuki KAWAMURA  Reinhard KLETTE  Koji OBOKATA  

     
    PAPER

      Page(s):
    987-994

    The purpose of this paper is to discuss length estimation based on digitized curves. Information on a curve in the Euclidean plane is lost after digitization. Higher resolution supports a convergence of a digital image towards the original curve with respect to Hausdorff metric. No matter how high resolution is assumed, it is impossible to know the length of an original curve exactly. In image analysis we estimate the length of a curve in the Euclidean plane based on an approximation. An approximate polygon converges to the original curve with an increase of resolution. Several approximation methods have been proposed so far. This paper proposes a new approximation method which generates polygonal curves closer (in the sense of Hausdorff metric) in general to its original curves than any of the previously known methods and discusses its relevance for length estimation by proving a Convergence Theorem.

  • Mobius Functions of Rooted Forests and Faigle-Kern's Dual Greedy Polyhedra

    Kazutoshi ANDO  

     
    PAPER

      Page(s):
    995-999

    A dual greedy polyhedron is defined by a system of linear inequalities, where the right-hand sides are given by a submodular function and the coefficients matrix is given by the incidence vectors of antichains of a rooted forest. Faigle and Kern introduced this concept and showed that a dual greedy algorithm works for the linear program over dual greedy polyhedra. In this paper, we show that a dual greedy polyhedron is the isomorphic image of an ordinary submodular polyhedron under the Mobius function of the underlying rooted forest. This observation enables us to reduce linear optimization problems over dual greedy polyhedra to those over ordinary submodular polyhedra. We show a new max-min theorem for intersection of two dual greedy polyhedra as well.

  • Polyhedral Proof of a Characterization of Perfect Bidirected Graphs

    Yoshiko T. IKEBE  Akihisa TAMURA  

     
    PAPER

      Page(s):
    1000-1007

    Bidirected graphs which are generalizations of undirected graphs, have three types of edges: (+,+)-edges, (-,-)-edges and (+,-)-edges. Undirected graphs are regarded as bidirected graphs whose edges are all of type (+,+). The notion of perfection of undirected graphs can be naturally extended to bidirected graphs in terms of polytopes. The fact that a bidirected graph is perfect if and only if the undirected graph obtained by replacing all edges to (+,+) is perfect was independently proved by several researchers. This paper gives a polyhedral proof of the fact and introduces some new knowledge on perfect bidirected graphs.

  • An Optimal Adaptive Diagnosis of Butterfly Networks

    Aya OKASHITA  Toru ARAKI  Yukio SHIBATA  

     
    PAPER

      Page(s):
    1008-1018

    System-level diagnosis is a very important technique for identifying faulty processors in a system with a large number of processors. Processors can test other processors, and then output the test results. The aim of diagnosis is to determine correctly the faulty/fault-free status of all processors. The adaptive diagnosis have been studied in order to perform diagnosis more efficiently. In this paper, we present adaptive diagnosis algorithms for a system modeled by butterfly networks. Our algorithms identify all faulty nodes in butterfly networks with the optimal number of tests. Then, we design another algorithm for diagnosis with very small constant number of rounds.

  • An Algorithm for Solving the Minimum Vertex Ranking Spanning Tree Problem on Interval Graphs

    Shin-ichi NAKAYAMA  Shigeru MASUYAMA  

     
    PAPER

      Page(s):
    1019-1026

    The minimum vertex ranking spanning tree problem is to find a spanning tree of G whose vertex ranking is minimum. This paper proposes an O(n3) time algorithm for solving the minimum vertex ranking spanning tree problem on an interval graph.

  • Properties on the Average Number of Spanning Trees in Connected Spanning Subgraphs for an Undirected Graph

    Peng CHENG  Shigeru MASUYAMA  

     
    PAPER

      Page(s):
    1027-1033

    Consider an undirected graph G=(V,E) with n (=|V|) vertices and m (=|E|) edges. It is well-known that the problem of computing the sequence Nn-1,Nn,...,Nm is #P-complete (see e.g.,[3]), where Ni denotes the number of connected spanning subgraphs with i (n-1!im) edges in G. In this paper, by proving new inequalities on the sequence Nn-1,Nn,...,Nm, we show an interesting and stronger property that the sequence γn-1n,...,γm, where γi denotes the average number of spanning trees in the connected spanning subgraphs with i edges, is a convex sequence as well as a monotonically increasing sequence, although this property does not hold for the sequence Nn-1,Nn,...,Nm.

  • List Edge-Colorings of Series-Parallel Graphs

    Tomoya FUJINO  Xiao ZHOU  Takao NISHIZEKI  

     
    PAPER

      Page(s):
    1034-1045

    Assume that each edge e of a graph G is assigned a list (set) L(e) of colors. Then an edge-coloring of G is called an L-edge-coloring if each edge e of G is colored with a color contained in L(e). In this paper, we prove that any series-parallel simple graph G has an L-edge-coloring if |L(e)| max{3,d(v),d(w)} for each edge e = vw, where d(v) and d(w) are the degrees of the ends v and w of e, respectively. Our proof yields a linear algorithm for finding an L-edge-coloring of series-parallel graphs.

  • On Approximation Algorithms for Coloring k-Colorable Graphs

    Xuzhen XIE  Takao ONO  Tomio HIRATA  

     
    PAPER

      Page(s):
    1046-1051

    Karger, Motwani and Sudan presented a graph coloring algorithm based on semidefinite programming, which colors any k-colorable graph with maximum degree Δ using 1-2/k) colors. This algorithm leads to an algorithm for k-colorable graph using (n 1-3/(k+1)) colors. This improved Wigderson's algorithm, which uses O(n1-1/(k-1)) colors, containing as a subroutine an algorithm using (Δ+1) colors for graphs with maximum degree Δ. It is easy to imagine that an algorithm which uses less colors in terms of Δ leads to an algorithm which uses less colors in terms of n. In this paper, we consider this influence assuming that we have an algorithm which uses (Δ 1-x/k) colors for 2<x<3. Specifically, we will show that the algorithms of Karger et al., of Blum and Karger and of Halperin et al. can be improved under this assumption.

  • Complexity and Completeness of Finding Another Solution and Its Application to Puzzles

    Takayuki YATO  Takahiro SETA  

     
    PAPER

      Page(s):
    1052-1060

    The Another Solution Problem (ASP) of a problem is the following problem: for a given instance x of and a solution s to it, find a solution to x other than s. The notion of ASP as a new class of problems was first introduced by Ueda and Nagao. They also pointed out that parsimonious reductions which allow polynomial-time transformation of solutions can derive the NP-completeness of ASP of a certain problem from that of ASP of another. In this paper we consider n-ASP, the problem to find another solution when n solutions are given, and formalize it to investigate its characteristics. In particular we consider ASP-completeness, the completeness with respect to the reductions satisfying the properties mentioned above. The complexity of ASPs has a relation with the difficulty of designing puzzles. We prove the ASP-completeness of three popular puzzles: Slither Link, Cross Sum, and Number Place. Since ASP-completeness implies NP-completeness, these results can be regarded as new results of NP-completeness proof of puzzles.

  • Constructing the Suffix Tree of a Tree with a Large Alphabet

    Tetsuo SHIBUYA  

     
    PAPER

      Page(s):
    1061-1066

    The problem of constructing the suffix tree of a tree is a generalization of the problem of constructing the suffix tree of a string. It has many applications, such as in minimizing the size of sequential transducers and in tree pattern matching. The best-known algorithm for this problem is Breslauer's O(nlog |Σ|) time algorithm where n is the size of the CS-tree and |Σ| is the alphabet size, which requires O(nlog n) time if |Σ| is large. We improve this bound by giving an optimal linear time algorithm for integer alphabets. We also describe a new data structure, the Bsuffix tree, which enables efficient query for patterns of completely balanced k-ary trees from a k-ary tree or forest. We also propose an optimal O(n) algorithm for constructing the Bsuffix tree for integer alphabets.

  • An Analysis of the AVL Balanced Tree Insertion Algorithm

    Ryozo NAKAMURA  Akio TADA  Tsuyoshi ITOKAWA  

     
    PAPER

      Page(s):
    1067-1074

    Mathematical analysis of the average behavior of the AVL balanced tree insertion algorithm has not ever been done completely. As the first step toward this analysis, we have proposed an approximate analysis based on the assumption that all AVL balanced trees with a given number of nodes and height are constructed with equal probability. In this paper, we propose a new analysis of the AVL balanced tree insertion algorithm in conformity with that all n! permutations of n keys occur with equal probability. First we derive the formulae to enumerate the number of permutations constructing the AVL balanced trees with a given number of nodes and height. Then, we propose the formulae to evaluate the average behavior of the AVL balanced tree insertion algorithm and show some results from the proposed formulae.

  • An Alternative Analysis of Linear Dynamic Hashing Algorithm

    Ayad SOUFIANE  Tsuyoshi ITOKAWA  Ryozo NAKAMURA  

     
    PAPER

      Page(s):
    1075-1081

    The linear hashing is a well-known dynamic hashing algorithm designed for internal main memory as well as external secondary memory. Traditional analysis of this search algorithm has been proposed under the assumption that all keys are uniformly accessed. In this paper, we present a discrete analysis of the average search cost of the linear dynamic hashing algorithm for internal main memory in consideration of the frequency of access on each key. In the proposed discrete analysis, the number of probes itself is regarded as a random variable and its probability distribution is derived concretely. Furthermore, the evaluate formula derived from the proposed analysis can exactly evaluate the average search cost in conformity with any probability distribution of the frequency of access. The proposed analysis is compared to the traditional one provided that the frequency of access on each key is uniform, and the differences are discussed.

  • A Hardware/Software Cosynthesis System for Processor Cores with Content Addressable Memories

    Nozomu TOGAWA  Takao TOTSUKA  Tatsuhiko WAKUI  Masao YANAGISAWA  Tatsuo OHTSUKI  

     
    PAPER

      Page(s):
    1082-1092

    Content addressable memory (CAM) is one of the functional memories which realize word-parallel equivalence search. Since a CAM unit is generally used in a particular application program, we consider that appropriate design for CAM units is required depending on the requirements for the application program. This paper proposes a hardware/software cosynthesis system for CAM processors. The input of the system is an application program written in C including CAM functions and a constraint for execution time (or CAM processor area). Its output is hardware descriptions of a synthesized processor and a binary code executed on it. Based on the branch-and-bound method, the system determines which CAM function is realized by a hardware and which CAM function is realized by a software with meeting the given timing constraint (or area constraint) and minimizing the CAM processor area (or execution time of the application program). We expect that we can realize optimal CAM processor design for an application program. Experimental results for several application programs show that we can obtain a CAM processor whose area is minimum with meeting the given timing constraint.

  • An LP-Based Local Search to the One Dimensional Cutting Stock Problem Using a Given Number of Cutting Patterns

    Shunji UMETANI  Mutsunori YAGIURA  Toshihide IBARAKI  

     
    PAPER

      Page(s):
    1093-1102

    The one dimensional cutting stock problem (1D-CSP) is one of the representative combinatorial optimization problems, which arises in many industries. As the setup costs of cutting patterns become more dominant in recent cutting industry, we consider a variant of 1D-CSP, in which the total number of applications of cutting patterns is minimized under the constraint that the number of different cutting patterns is specified in advance. We propose a local search algorithm that uses the neighborhood obtained by perturbating one cutting pattern in the current set of patterns, where the perturbations are done by utilizing the dual solution of the auxiliary linear programming problem (LP). In this process, in order to solve a large number of LPs, we start the criss-cross variation of the simplex algorithm from the optimal simplex tableau of the previous solution, instead of starting it from scratch. According to our computational experiment, it is observed that the proposed algorithm obtains a wide variety of good solutions which are comparable to the existing heuristic approaches.

  • Randomized Time- and Energy-Optimal Routing in Single-Hop, Single-Channel Radio Networks

    Jacir L. BORDIM  Jiangtao CUI  Koji NAKANO  

     
    PAPER

      Page(s):
    1103-1112

    A Radio Network (RN, for short) is a distributed system with no central arbiter, consisting of p radio stations each of which is endowed with a radio transceiver. In this work we consider single-hop, single channel RNs, where each station S(i), (1ip), initially stores si items which are tagged with the unique destination they must be routed. Since each item must be transmitted at least once, every routing protocol must take at least n = s1 + s2 + + sp time slots to route each item to its final destination. Similarly, each station S(i), (1ip), must be awake for at least si + di time slots to broadcast si items and to receive di items, where di denotes the number of items destined for S(i). The main contribution of this work is to present a randomized time- and energy-optimal routing protocol on the RN. Let qi, (1ip), be the number of stations that have items destined for S(i), q=q1 +q2 ++ qp, and ri be the number of stations for which S(i) has items. When qi is known to station S(i), our routing protocol runs, with probability exceeding 1 - , (f > 1), in n + O(q + log f) time slots with each station S(i) being awake for at most si + di + O(qi + ri + log f) time slots. Since qidi, risi, and qn always hold, our randomized routing protocol is optimal. We also show that, when the value of di is known to S(i), our routing protocol runs, with probability exceeding 1 - , (f > 1), in O(n + log f) time slots with no station being awake for more than O(si + di + log f) time slots.

  • Quantum Algorithms for Intersection and Proximity Problems

    Kunihiko SADAKANE  Norito SUGAWARA  Takeshi TOKUYAMA  

     
    PAPER

      Page(s):
    1113-1119

    We discuss applications of quantum computation to geometric data processing. Especially, we give efficient algorithms for intersection problems and proximity problems. Our algorithms are based on Brassard et al. 's amplitude amplification method, and analogous to Buhrman et al. 's algorithm for element distinctness. Revealing these applications is useful for classifying geometric problems, and also emphasizing potential usefulness of quantum computation in geometric data processing. Thus, the results will promote research and development of quantum computers and algorithms.

  • Transitive Signature Scheme for Directed Trees

    Hidenori KUWAKADO  Hatsukazu TANAKA  

     
    PAPER

      Page(s):
    1120-1126

    Micali and Rivest have proposed a transitive signature scheme for an undirected graph, which is suitable for signing data with undirected graph structure. The problem of finding a transitive signature scheme for a directed graph has remained an open problem. In this paper, we propose a transitive signature scheme for a directed tree. Since the directed tree is a special case of the directed graph, the proposed scheme is a partial solution for the open problem. We also show that a transitive signature scheme for the undirected graph can be constructed from a bundling homomorphism. This means that the transitive signature scheme for the undirected graph is closely related with a fail-stop signature scheme.

  • Baby Step Giant Step Algorithms in Point Counting of Hyperelliptic Curves

    Kazuto MATSUO  Jinhui CHAO  Shigeo TSUJII  

     
    PAPER

      Page(s):
    1127-1134

    Counting the number of points of Jacobian varieties of hyperelliptic curves over finite fields is necessary for construction of hyperelliptic curve cryptosystems. Recently Gaudry and Harley proposed a practical scheme for point counting of hyperelliptic curves. Their scheme consists of two parts: firstly to compute the residue modulo a positive integer m of the order of a given Jacobian variety, and then search for the order by a square-root algorithm. In particular, the parallelized Pollard's lambda-method was used as the square-root algorithm, which took 50CPU days to compute an order of 127 bits. This paper shows a new variation of the baby step giant step algorithm to improve the square-root algorithm part in the Gaudry-Harley scheme. With knowledge of the residue modulo m of the characteristic polynomial of the Frobenius endomorphism of a Jacobian variety, the proposed algorithm provides a speed up by a factor m, instead of in square-root algorithms. Moreover, implementation results of the proposed algorithm is presented including a 135-bit prime order computed about 15 hours on Alpha 21264/667 MHz and a 160-bit order.

  • An Efficient Representation of Scalars for Simultaneous Elliptic Scalar Multiplication

    Yasuyuki SAKAI  Kouichi SAKURAI  

     
    PAPER

      Page(s):
    1135-1146

    The computational performance of cryptographic protocols using an elliptic curve strongly depends on the efficiency of the scalar multiplication. Some elliptic curve based cryptographic protocols, such as signature verification, require computation of multi scalar multiplications of kP+lQ, where P and Q are points on an elliptic curve. An efficient way to compute kP+lQ is to compute two scalar multiplications simultaneously, rather than computing each scalar multiplication separately. We introduce new efficient algorithms for simultaneous scalar multiplication on an elliptic curve. We also give a detailed analysis of the computational efficiency of our proposed algorithms.

  • Random-Error Resilience of a Short Collusion-Secure Code

    Katsunari YOSHIOKA  Tsutomu MATSUMOTO  

     
    PAPER

      Page(s):
    1147-1155

    The c-Secure CRT code is a collusion-secure fingerprinting code whose code length is reduced by using the Chinese Remainder Theorem. The tracing algorithm for the c-secure CRT code drops its performance of traitor tracing when random errors are added to the codewords. In this paper, we show two approaches to enhance random-error-resilience to the tracing algorithm of the c-secure CRT code. The first approach is introducing thresholds for the distinction of the detected part of the embedded data called detected blocks. We propose a method to derive appropriate values of the thresholds on an assumption that the tracer can estimate the random error rate. This modification extends the capability of traitor tracing to the attacks in which the alteration rate of the detected blocks is not fixed to 0.5. The second approach is extending the scope of the search for the detected blocks. With numerical results by computer simulations, we confirmed an impressive improvement of random-error-resilience of a c-secure CRT code.

  • New Security Index for Digital Fingerprinting and Its Bounds

    Shingo ORIHARA  Takaaki MIZUKI  Takao NISHIZEKI  

     
    PAPER

      Page(s):
    1156-1163

    Fingerprinting is one of the digital watermarking techniques, and is becoming more important as a copyright protection technique. Fingerprinting must resist collusion attacks. As a security index, "c-secureness" has been proposed, but it has been known that there is indeed no c-secure code. In this paper, we introduce a new index to measure the resilience of fingerprinting for collusion attacks and obtain some upper bounds and a lower bound on the index.

  • On the Strength of the Strong RSA Assumption

    Shintaro ITAGAKI  Masahiro MAMBO  Hiroki SHIZUYA  

     
    PAPER

      Page(s):
    1164-1170

    The strong RSA assumption is an assumption that the following problem is hard to solve: Given an RSA modulus and a ciphertext, find a pair of plaintext and exponent corresponding to them. It differs from the standard RSA assumption in a sense that in the strong version, no exponent is given as an input. The strong RSA assumption is considered to be stronger than the RSA assumption, but their exact relationship is not known. We investigate the strength of the strong RSA assumption and show that the strong RSA assumption restricted to low exponents is equivalent to the assumption that RSA problem is intractable for any low exponent. We also show that in terms of algebraic computation, the strong RSA assumption is properly stronger than the RSA assumption if there exists an RSA modulus n such that gcd((n),3)=1 and RSA problem is intractable.

  • A Simple Power Attack on a Randomized Addition-Subtraction Chains Method for Elliptic Curve Cryptosystems

    Katsuyuki OKEYA  Kouichi SAKURAI  

     
    PAPER

      Page(s):
    1171-1180

    We show that a randomized addition-sub-traction chains countermeasure against side channel attacks is vulnerable to an SPA attack, which is a kind of side channel attack, under distinguishability between addition and doubling. The side channel attack takes advantage of information leaked during execution of a cryptographic procedure. The randomized addition-subtraction chains countermeasure was proposed by Oswald-Aigner, and is based on a random decision inserted into computations. However, the question of its immunity to side channel attacks is still controversial. The randomized addition-subtraction chains countermeasure has security flaw in timing attacks, another kind of side channel attack. We have implemented the proposed attack algorithm, whose input is a set of AD sequences, which consist of the characters "A" and "D" to indicate addition and doubling, respectively. Our program has clarified the effectiveness of the attack. The attack algorithm could actually detect secret scalars for given AD sequences. The average time to detect a 160-bit scalar was about 6 milliseconds, and only 30 AD sequences were enough to detect such a scalar. Compared with other countermeasures against side channel attacks, the randomized addition-subtraction chains countermeasure is much slower.

  • On the Security of Girault Key Agreement Protocols against Active Attacks

    Soo-Hyun OH  Masahiro MAMBO  Hiroki SHIZUYA  Dong-Ho WON  

     
    PAPER

      Page(s):
    1181-1189

    In 1991 Girault proposed a key agreement protocol based on his new idea of self-certified public key. Later Rueppel and Oorschot showed variants of the Girault scheme. All of these key agreement protocols inherit positive features of self-certified public key so that they can provide higher security and smaller communication overhead than key agreement protocols not based on self-certified public key. Even with such novel features, rigorous security of these protocols has not been made clear yet. In this paper, we give rigorous security analysis of the original and variants of Girault key agreement protocol under several kinds of active attacker models. In particular we show that protocols are either insecure or proven as secure as the Diffie-Hellman problem over Zn with respect to the reduction among functions of computing them. Analyzed protocols include a new variant of 1-pass protocol. As opposed to the original 1-pass protocol, the new variant provides mutual implicit key authentication without increasing the number of passes.

  • Statistical Analysis of χ2-Attacks

    Norihisa ISOGAI  Atsuko MIYAJI  Masao NONAKA  

     
    PAPER

      Page(s):
    1190-1197

    The χ2-attack was originally proposed by Knudsen and Meier. This attack is one of the most effective attacks for RC6. The χ2-attack can be used for both distinguishing attacks and for key recovery attacks. Although, up to the present, theoretical analysis of χ2-attacks, especially the relation between a distinguishing attack and a key recovery attack, has not been discussed, the security against key recovery attacks has been often discussed by the results of distinguishing attacks. In this paper, we investigate the theoretical relation between the distinguishing attack and the key recovery attack, and prove one theorem to evaluate the exact security against the key recovery attacks by using the results of the distinguishing attack. Furthermore we propose two key recovery attacks against RC5-64 and implement them. Our best key recovery attack can analyze RC5-64 with 16 rounds by using 2125.23 plaintexts with a success probability of 30%. This result works faster than exhaustive key search. As far as the authors know, this is the best result of known plaintext attacks to RC5-64. We also apply our theory on our key recovery attacks and demonstrate the validity.

  • A Note on the Relationships among Certified Discrete Log Cryptosystems

    Eikoh CHIDA  Toshiya ITOH  Hiroki SHIZUYA  

     
    PAPER

      Page(s):
    1198-1202

    The certified discrete logarithm problem modulo p prime is a discrete logarithm problem under the conditions that the complete factorization of p-1 is given and by which the base g is certified to be a primitive root mod p. For the cryptosystems based on the intractability of certified discrete logarithm problem, Sakurai-Shizuya showed that breaking the Diffie-Hellman key exchange scheme reduces to breaking the Shamir 3-pass key transmission scheme with respect to the expected polynomial-time Turing reducibility. In this paper, we show that we can remove randomness from the reduction above, and replace the reducibility with the polynomial-time many-one. Since the converse reduction is known to hold with respect to the polynomial-time many-one reducibility, our result gives a stronger evidence for that the two schemes are completely equivalent as certified discrete log cryptosystems.

  • An Incremental Wiring Algorithm for VLSI Layout Design

    Yukiko KUBO  Shigetoshi NAKATAKE  Yoji KAJITANI  Masahiro KAWAKITA  

     
    LETTER

      Page(s):
    1203-1206

    One of the difficulties in routing problem is in wirability which is to guarantee a physical connection of a given topological route. Wirability often fails since the width of a wire is relatively large compared with the size of modules. As a possible solution, this paper proposes an incremental wiring algorithm which generates wires net-by-net without overlapping other pre-placed circuit elements. The idea is to divide a wire into a series of rectangles and handles them as modules with additional constraints to keep the shape of the wire. The algorithm was implemented and experimented on a small instance to show its promising performance.

  • Las Vegas, Self-Verifying Nondeterministic and Deterministic One-Way Multi-Counter Automata with Bounded Time

    Tsunehiro YOSHINAGA  Katsushi INOUE  

     
    LETTER

      Page(s):
    1207-1212

    This paper investigates the accepting powers of deterministic, Las Vegas, self-verifying nondeterministic, and nondeterministic one-way multi-counter automata with time-bounds. We show that (1) for each k1, there is a language accepted by a Las Vegas one-way k-counter automaton operating in real time, but not accepted by any deterministic one-way k-counter automaton operating in linear time, (2) there is a language accepted by a self-verifying nondeterministic one-way 2-counter automaton operating in real time, but not accepted by any Las Vegas one-way multi-counter automaton operating in polynomial time, (3) there is a language accepted by a self-verifying nondeterministic one-way 1-counter automaton operating in real time, but not accepted by any deterministic one-way multi-counter automaton operating in polynomial time, and (4) there is a language accepted by a nondeterministic one-way 1-counter automaton operating in real time, but not accepted by any self-verifying nondeterministic one-way multi-counter automaton operating in polynomial time.

  • On the n-th Order Shift Register Based Discrete Logarithm

    Chik-How TAN  Xun YI  Chee-Kheong SIEW  

     
    LETTER

      Page(s):
    1213-1216

    In this paper, we examine the basic properties of n-th order linear feedback shift registers and show that n-th order shift registers based discrete logarithm problem is equivalent to discrete logarithm problem. This shows that the algebraic structure of n-th order linear feedback shift registers is useful in constructing cryptographic primitives.

  • Regular Section
  • SAR Image Enhancement Based on Phase-Extension Inverse Filtering

    Dae-Won DO  Woo-Jin SONG  

     
    PAPER-Digital Signal Processing

      Page(s):
    1217-1224

    In this paper we present a new post enhancement method for single look complex (SLC) SAR imagery, which is based on phase-extension inverse filtering. To obtain a high-quality SAR image, the proposed method improves the mainlobe resolution as well as efficiently suppresses the sidelobes with low computational complexity. The proposed method extends the effective signal band up to the maximum-bandwidth allowed by a SAR system. The band-extension is achieved by adjusting the magnitude level of matched filtered SAR spectrum. Because the proposed method preserves the phase components of the spectrum unlike other super-resolution techniques and deconvolution techniques, it enhances a SAR image without causing any displacement. To verify the efficacy of the proposed method we apply it to a simulated SAR image and a real ERS-1 SAR image. The result images show that the proposed method improves the mainlobe resolution with low sidelobe levels.

  • A Versatile CMOS Analog Multiplier

    Ittipong CHAISAYUN  Kobchai DEJHAN  

     
    PAPER-Analog Signal Processing

      Page(s):
    1225-1232

    This paper describes a novel four-quadrant analog multiplier. It is comprised of two mixed signal circuits, a voltage adder circuit, a voltage divider circuit and a basic multiplier. Its major advantages over the other analog multipliers are: this design has single ended inputs, the geometry of all CMOS transistors are equal, and its output can be the product of two signal currents, the product of two signal voltages, or the product of a signal current and a signal voltage. Second-order effects are analyzed, and the experimental and simulative results that confirm the theoretical analysis are carried out.

  • A CMOS 310MHz, 20dB Variable Gain Amplifier

    Khayrollah HADIDI  Abdollah KHOEI  Mahta JENABI  Hamed PEYRAVI  

     
    PAPER-Analog Signal Processing

      Page(s):
    1233-1239

    This paper describes a new special purpose Variable Gain Amplifier (VGA) using 0.5µm digital CMOS process. The new architecture allows the gain to be varied more than 20dB, and does not trade bandwidth for gain. Despite low power consumption (22mW) from a 3.3 Volt supply, the circuit has 310MHz -3dB bandwidth and shows low THD (-45dB) over its full frequency range. The new VGA architecture does not use any capacitor or resistor array for gain adjustment, thus it is very compact (0.14mm 0.26mm) and requires less power than conventional designs.

  • Second-Order Polynomial Estimators from Non-independent Uncertain Observations Using Covariance Information

    Seiichi NAKAMORI  Raquel CABALLERO-AGUILA  Aurora HERMOSO-CARAZO  Josefa LINARES-PEREZ  

     
    PAPER-Systems and Control

      Page(s):
    1240-1248

    Least-squares second-order polynomial filter and fixed-point smoother are derived in systems with uncertain observations, when the variables describing the uncertainty are non-independent. The proposed estimators do not require the knowledge of the state-space model of the signal. The available information is only the moments, up to the fourth one, of the involved processes, the probability that the signal exists in the observations and the (2,2) element of the conditional probability matrices of the sequence describing the uncertainty.

  • Piecewise Linear Operators on Sigma-Delta Modulated Signals and Their Application

    Hisato FUJISAKA  Yuji HIDAKA  Singo KAJITA  Mititada MORISUE  

     
    PAPER-Nonlinear Problems

      Page(s):
    1249-1255

    Piecewise linear (PWL) circuit modules operating on sigma-delta (ΣΔ) modulated signals and nonlinear signal processors built of these modules are proposed. The proposed module library includes absolute circuits, min/max selectors and negative resistances. Their output signal-to-noise ratio is higher than 50dB when their oversampling ratio is 28. A nonlinear filter and a stochastic resonator are presented as applications of the PWL modules to ΣΔ domain signal processing. The filter is structured with 37% of logic gates consumed by an equivalent filter with a 5-bit parallel signal form.

  • Maximum Likelihood Estimation in a Mixture Regression Model Using the Continuation Method

    Hideo HIROSE  Yoshio KOMORI  

     
    PAPER-Numerical Analysis and Optimization

      Page(s):
    1256-1265

    To an extremely difficult problem of finding the maximum likelihood estimates in a specific mixture regression model, a combination of several optimization techniques is found to be useful. These algorithms are the continuation method, Newton-Raphson method, and simplex method. The simplex method searches for an approximate solution in a wider range of the parameter space, then a combination of the continuation method and the Newton-Raphson method finds a more accurate solution. In this paper, this combination method is applied to find the maximum likelihood estimates in a Weibull-power-law type regression model.

  • A Recursive Procedure for Designing Optimal d-Matched Digraphs

    Kiyoaki YOSHIDA  Yasumasa SUJAKU  Tohru KOHDA  

     
    PAPER-Graphs and Networks

      Page(s):
    1266-1274

    We define a d-matched digraph and propose a recursive procedure for designing an optimal d-matched digraph without bidirectional edges. The digraph represents an optimal highly structured system which is a special class of self-diagnosable systems and identifies all of the faulty units independently and locally in O(|E|) time complexity. The procedure is straightforward and gives a system flexible in network connections. Hence the procedure is applicable to real systems such as the Internet or cooperative robotic systems which change their topology dynamically.

  • On the Problem of Generating Mutually Independent Random Sequences

    Jun MURAMATSU  Hiroki KOGA  Takafumi MUKOUCHI  

     
    PAPER-Information Theory

      Page(s):
    1275-1284

    The achievable rate region related to the problem of generating mutually independent random sequences is determined. Furthermore, it is proved that the output distribution of lossless source encoders with correlated side information is asymptotically independent of the side information. Based on this, we can realize a random number generator that produces mutually asymptotically independent random sequences from random sequences emitted from correlated sources.

  • Linear Complexities of Periodic Sequences Obtained from Sequences over Z4 and Z8 by One-Symbol Substitution

    Tsutomu MORIUCHI  Satoshi UEHARA  Takayasu KAIDA  Kyoki IMAMURA  

     
    PAPER-Information Theory

      Page(s):
    1285-1293

    In this paper, we will show that some families of periodic sequences over Z4 and Z8 with period multiple of 2r-1 generated by r-th degree basic primitive polynomials assorted by the root of each polynomial, and give the exact distribution of sequences for each family. We also point out such an instability as an extreme increase of their linear complexities for the periodic sequences by one-symbol substitution, i.e., from the minimum value to the maximum value, for all the substitutions except one.

  • A New Analog Correlator Circuit for DS-CDMA Wireless Applications

    Mostafa A. R. ELTOKHY  Boon-Keat TAN  Toshimasa MATSUOKA  Kenji TANIGUCHI  

     
    PAPER-Spread Spectrum Technologies and Applications

      Page(s):
    1294-1301

    A new analog correlator circuit is proposed for direct sequence code division multiple access (DS-CDMA) demodulator. The circuit consists of only 16 switches, 4 capacitors and 2 level shifters. Control sequence requires only three clock phases. Simulation with code length of 127 reveals that the proposed circuit has a good ability to cancel off the charge error and dissipates 3.4mW at 128MHz. The circuit had been designed using a 0.6µm CMOS process. The area of 256µm 245µm is estimated to be 9 times smaller compared to other reported equivalent analog correlators.

  • Simple Extension of a Numerical Algorithm for Feedback Linearization to Multi-Input Nonlinear Systems

    Yu Jin JANG  Sang Woo KIM  

     
    LETTER-Systems and Control

      Page(s):
    1302-1308

    Obtaining a linearizing feedback and a coordinate transformation map is very difficult, even though the system is feedback linearizable. It is known that finding a desired transformation map and feedback is equivalent to finding an integrating factor for an annihilating one-form for single input nonlinear systems. It is also known that such an integrating factor can be approximated using the simple C.I.R method and tensor product splines. In this paper, it is shown that m integrating factors can always be approximated whenever a nonlinear system with m inputs is feedback linearizable. Next, m zero-forms can be constructed by utilizing these m integrating factors and the same methodology in the single input case. Hence, the coordinate transformation map is obtained.

  • Describing Function of Coulomb Friction for the Ramp Reference Input

    Dong-Jin LIM  

     
    LETTER-Systems and Control

      Page(s):
    1309-1311

    The conventional describing function of Coulo-mb friction is based on the assumption that the reference input is constant. The author proposes the describing function of Coulomb friction for the ramp reference input. The experimental results for the DC servo motor control system with ramp tracking controller are shown.

  • Output Feedback Passification of Nonlinear Systems Not in Normal Form

    Young I. SON  Hyungbo SHIM  Nam H. JO  Jin H. SEO  

     
    LETTER-Systems and Control

      Page(s):
    1312-1315

    In this paper, the problem of output feedback passification for nonlinear systems is considered. Contrary to the conventional methodologies, our approach does not require the normal form representation of the system. Consequent advantages include that the system need not have a well-defined relative degree. In particular, we present a necessary and sufficient condition for output feedback passification without relying on the normal form. The proposed condition finally leads to an extension for a recent result when the system does have a normal form.

  • Efficient Arithmetic in Optimal Extension Fields Using Simultaneous Multiplication

    Mun-Kyu LEE  Kunsoo PARK  

     
    LETTER-Information Security

      Page(s):
    1316-1321

    A new algorithm for efficient arithmetic in an optimal extension field is proposed. The new algorithm improves the speeds of multiplication, squaring, and inversion by performing two subfield multiplications simultaneously within a single integer multiplication instruction of a CPU. Our algorithm is used to improve throughputs of elliptic curve operations.