Instruction-Level Power Estimation Method by Considering Hamming Distance of Registers
Summary :
This paper proposes an instruction-level power estimation method for an embedded RISC processor, the power consumption of which fluctuates so much by applications and input data. The proposed method estimates the power consumption from the result of ISS (Instruction Set Simulator) and energy tables according to Hamming Distance of Registers (HDR) of all instructions. It is over 105 times faster than the gate-level detailed logic simulation, while the estimated power curves have the same tendency with those from the logic simulation. The proposed method realizes both accurate and fast power estimation of embedded processors.
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- IEICE TRANSACTIONS on Fundamentals Vol.E87-A No.4 pp.823-829
- Publication Date
- 2004/04/01
- Publicized
- Online ISSN
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- Type of Manuscript
- Special Section PAPER (Special Section on Selected Papers from the 16th Workshop on Circuits and Systems in Karuizawa)
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Akihiko HIGUCHI, Kazutoshi KOBAYASHI, Hidetoshi ONODERA, "Instruction-Level Power Estimation Method by Considering Hamming Distance of Registers" in IEICE TRANSACTIONS on Fundamentals,
vol. E87-A, no. 4, pp. 823-829, April 2004, doi: .
Abstract: This paper proposes an instruction-level power estimation method for an embedded RISC processor, the power consumption of which fluctuates so much by applications and input data. The proposed method estimates the power consumption from the result of ISS (Instruction Set Simulator) and energy tables according to Hamming Distance of Registers (HDR) of all instructions. It is over 105 times faster than the gate-level detailed logic simulation, while the estimated power curves have the same tendency with those from the logic simulation. The proposed method realizes both accurate and fast power estimation of embedded processors.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e87-a_4_823/_p
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@ARTICLE{e87-a_4_823,
author={Akihiko HIGUCHI, Kazutoshi KOBAYASHI, Hidetoshi ONODERA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Instruction-Level Power Estimation Method by Considering Hamming Distance of Registers},
year={2004},
volume={E87-A},
number={4},
pages={823-829},
abstract={This paper proposes an instruction-level power estimation method for an embedded RISC processor, the power consumption of which fluctuates so much by applications and input data. The proposed method estimates the power consumption from the result of ISS (Instruction Set Simulator) and energy tables according to Hamming Distance of Registers (HDR) of all instructions. It is over 105 times faster than the gate-level detailed logic simulation, while the estimated power curves have the same tendency with those from the logic simulation. The proposed method realizes both accurate and fast power estimation of embedded processors.},
keywords={},
doi={},
ISSN={},
month={April},}
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TY - JOUR
TI - Instruction-Level Power Estimation Method by Considering Hamming Distance of Registers
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 823
EP - 829
AU - Akihiko HIGUCHI
AU - Kazutoshi KOBAYASHI
AU - Hidetoshi ONODERA
PY - 2004
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E87-A
IS - 4
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - April 2004
AB - This paper proposes an instruction-level power estimation method for an embedded RISC processor, the power consumption of which fluctuates so much by applications and input data. The proposed method estimates the power consumption from the result of ISS (Instruction Set Simulator) and energy tables according to Hamming Distance of Registers (HDR) of all instructions. It is over 105 times faster than the gate-level detailed logic simulation, while the estimated power curves have the same tendency with those from the logic simulation. The proposed method realizes both accurate and fast power estimation of embedded processors.
ER -
English
