A Low-Complexity and High-Performance 2D Look-Up Table for LDPC Hardware Implementation
Summary :
In this paper, we propose a low-complexity, high-efficiency two-dimensional look-up table (2D LUT) for carrying out the sum-product algorithm in the decoding of low-density parity-check (LDPC) codes. Instead of employing adders for the core operation when updating check node messages, in the proposed scheme, the main term and correction factor of the core operation are successfully merged into a compact 2D LUT. Simulation results indicate that the proposed 2D LUT not only attains close-to-optimal bit error rate performance but also enjoys a low complexity advantage that is suitable for hardware implementation.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E92-A No.11 pp.2941-2944
- Publication Date
- 2009/11/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1587/transfun.E92.A.2941
- Type of Manuscript
- LETTER
- Category
- Coding Theory
Authors
Keyword
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Jung-Chieh CHEN, Po-Hui YANG, Jenn-Kaie LAIN, Tzu-Wen CHUNG, "A Low-Complexity and High-Performance 2D Look-Up Table for LDPC Hardware Implementation" in IEICE TRANSACTIONS on Fundamentals,
vol. E92-A, no. 11, pp. 2941-2944, November 2009, doi: 10.1587/transfun.E92.A.2941.
Abstract: In this paper, we propose a low-complexity, high-efficiency two-dimensional look-up table (2D LUT) for carrying out the sum-product algorithm in the decoding of low-density parity-check (LDPC) codes. Instead of employing adders for the core operation when updating check node messages, in the proposed scheme, the main term and correction factor of the core operation are successfully merged into a compact 2D LUT. Simulation results indicate that the proposed 2D LUT not only attains close-to-optimal bit error rate performance but also enjoys a low complexity advantage that is suitable for hardware implementation.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E92.A.2941/_p
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@ARTICLE{e92-a_11_2941,
author={Jung-Chieh CHEN, Po-Hui YANG, Jenn-Kaie LAIN, Tzu-Wen CHUNG, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Low-Complexity and High-Performance 2D Look-Up Table for LDPC Hardware Implementation},
year={2009},
volume={E92-A},
number={11},
pages={2941-2944},
abstract={In this paper, we propose a low-complexity, high-efficiency two-dimensional look-up table (2D LUT) for carrying out the sum-product algorithm in the decoding of low-density parity-check (LDPC) codes. Instead of employing adders for the core operation when updating check node messages, in the proposed scheme, the main term and correction factor of the core operation are successfully merged into a compact 2D LUT. Simulation results indicate that the proposed 2D LUT not only attains close-to-optimal bit error rate performance but also enjoys a low complexity advantage that is suitable for hardware implementation.},
keywords={},
doi={10.1587/transfun.E92.A.2941},
ISSN={1745-1337},
month={November},}
Copy
TY - JOUR
TI - A Low-Complexity and High-Performance 2D Look-Up Table for LDPC Hardware Implementation
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2941
EP - 2944
AU - Jung-Chieh CHEN
AU - Po-Hui YANG
AU - Jenn-Kaie LAIN
AU - Tzu-Wen CHUNG
PY - 2009
DO - 10.1587/transfun.E92.A.2941
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E92-A
IS - 11
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - November 2009
AB - In this paper, we propose a low-complexity, high-efficiency two-dimensional look-up table (2D LUT) for carrying out the sum-product algorithm in the decoding of low-density parity-check (LDPC) codes. Instead of employing adders for the core operation when updating check node messages, in the proposed scheme, the main term and correction factor of the core operation are successfully merged into a compact 2D LUT. Simulation results indicate that the proposed 2D LUT not only attains close-to-optimal bit error rate performance but also enjoys a low complexity advantage that is suitable for hardware implementation.
ER -
English
