IEICE TRANSACTIONS on Fundamentals
An Approach for Reducing Leakage Current Variation due to Manufacturing Variability
Summary :
Leakage current is an important qualitative metric of LSI (Large Scale Integrated circuit). In this paper, we focus on reduction of leakage current variation under the process variation. Firstly, we derive a set of quadratic equations to evaluate delay and leakage current under the process variation. Using these equations, we discuss the cases of varying leakage current without degrading delay distribution and propose a procedure to reduce the leakage current variations. From the experiments, we show the proposed method effectively reduces the leakage current variation up to 50% at 90 percentile point of the distribution compared with the conventional design approach.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E92-A No.12 pp.3016-3023
- Publication Date
- 2009/12/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1587/transfun.E92.A.3016
- Type of Manuscript
- Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
- Category
- Device and Circuit Modeling and Analysis
Authors
Tsuyoshi SAKATA
Takaaki OKUMURA
Atsushi KUROKAWA
Hidenari NAKASHIMA
Hiroo MASUDA
Takashi SATO
Masanori HASHIMOTO
Koutaro HACHIYA
Katsuhiro FURUKAWA
Masakazu TANAKA
Hiroshi TAKAFUJI
Toshiki KANAMOTO
Keyword
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Tsuyoshi SAKATA, Takaaki OKUMURA, Atsushi KUROKAWA, Hidenari NAKASHIMA, Hiroo MASUDA, Takashi SATO, Masanori HASHIMOTO, Koutaro HACHIYA, Katsuhiro FURUKAWA, Masakazu TANAKA, Hiroshi TAKAFUJI, Toshiki KANAMOTO, "An Approach for Reducing Leakage Current Variation due to Manufacturing Variability" in IEICE TRANSACTIONS on Fundamentals,
vol. E92-A, no. 12, pp. 3016-3023, December 2009, doi: 10.1587/transfun.E92.A.3016.
Abstract: Leakage current is an important qualitative metric of LSI (Large Scale Integrated circuit). In this paper, we focus on reduction of leakage current variation under the process variation. Firstly, we derive a set of quadratic equations to evaluate delay and leakage current under the process variation. Using these equations, we discuss the cases of varying leakage current without degrading delay distribution and propose a procedure to reduce the leakage current variations. From the experiments, we show the proposed method effectively reduces the leakage current variation up to 50% at 90 percentile point of the distribution compared with the conventional design approach.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E92.A.3016/_p
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@ARTICLE{e92-a_12_3016,
author={Tsuyoshi SAKATA, Takaaki OKUMURA, Atsushi KUROKAWA, Hidenari NAKASHIMA, Hiroo MASUDA, Takashi SATO, Masanori HASHIMOTO, Koutaro HACHIYA, Katsuhiro FURUKAWA, Masakazu TANAKA, Hiroshi TAKAFUJI, Toshiki KANAMOTO, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={An Approach for Reducing Leakage Current Variation due to Manufacturing Variability},
year={2009},
volume={E92-A},
number={12},
pages={3016-3023},
abstract={Leakage current is an important qualitative metric of LSI (Large Scale Integrated circuit). In this paper, we focus on reduction of leakage current variation under the process variation. Firstly, we derive a set of quadratic equations to evaluate delay and leakage current under the process variation. Using these equations, we discuss the cases of varying leakage current without degrading delay distribution and propose a procedure to reduce the leakage current variations. From the experiments, we show the proposed method effectively reduces the leakage current variation up to 50% at 90 percentile point of the distribution compared with the conventional design approach.},
keywords={},
doi={10.1587/transfun.E92.A.3016},
ISSN={1745-1337},
month={December},}
Copy
TY - JOUR
TI - An Approach for Reducing Leakage Current Variation due to Manufacturing Variability
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 3016
EP - 3023
AU - Tsuyoshi SAKATA
AU - Takaaki OKUMURA
AU - Atsushi KUROKAWA
AU - Hidenari NAKASHIMA
AU - Hiroo MASUDA
AU - Takashi SATO
AU - Masanori HASHIMOTO
AU - Koutaro HACHIYA
AU - Katsuhiro FURUKAWA
AU - Masakazu TANAKA
AU - Hiroshi TAKAFUJI
AU - Toshiki KANAMOTO
PY - 2009
DO - 10.1587/transfun.E92.A.3016
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E92-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2009
AB - Leakage current is an important qualitative metric of LSI (Large Scale Integrated circuit). In this paper, we focus on reduction of leakage current variation under the process variation. Firstly, we derive a set of quadratic equations to evaluate delay and leakage current under the process variation. Using these equations, we discuss the cases of varying leakage current without degrading delay distribution and propose a procedure to reduce the leakage current variations. From the experiments, we show the proposed method effectively reduces the leakage current variation up to 50% at 90 percentile point of the distribution compared with the conventional design approach.
ER -
English
