One method for achieving high-speed waveform digitizing uses time-interleaved A-D Converters (ADCs). It is known that, in this method, using multiple ADCs enables sampling at a rate higher than the sampling rate of the ADC being used. Degradation of the dynamic range, however, results from such factors as phase error in the sampling clock applied to the ADC, and mismatched frequency characteristics among the individual ADCs. This paper describes a method for correcting these mismatches using a digital signal processing (DSP) technique for automatic test equipment applications. This method can be applied to any number of interleaved ADCs, and it does not require any additional hardware; good correction and improved accuracy can be obtained simply by adding a little to the computing overhead.
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Koji ASAMI, Takahide SUZUKI, Hiroyuki MIYAJIMA, Tetsuya TAURA, Haruo KOBAYASHI, "Technique to Improve the Performance of Time-Interleaved A-D Converters with Mismatches of Non-linearity" in IEICE TRANSACTIONS on Fundamentals,
vol. E92-A, no. 2, pp. 374-380, February 2009, doi: 10.1587/transfun.E92.A.374.
Abstract: One method for achieving high-speed waveform digitizing uses time-interleaved A-D Converters (ADCs). It is known that, in this method, using multiple ADCs enables sampling at a rate higher than the sampling rate of the ADC being used. Degradation of the dynamic range, however, results from such factors as phase error in the sampling clock applied to the ADC, and mismatched frequency characteristics among the individual ADCs. This paper describes a method for correcting these mismatches using a digital signal processing (DSP) technique for automatic test equipment applications. This method can be applied to any number of interleaved ADCs, and it does not require any additional hardware; good correction and improved accuracy can be obtained simply by adding a little to the computing overhead.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E92.A.374/_p
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@ARTICLE{e92-a_2_374,
author={Koji ASAMI, Takahide SUZUKI, Hiroyuki MIYAJIMA, Tetsuya TAURA, Haruo KOBAYASHI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Technique to Improve the Performance of Time-Interleaved A-D Converters with Mismatches of Non-linearity},
year={2009},
volume={E92-A},
number={2},
pages={374-380},
abstract={One method for achieving high-speed waveform digitizing uses time-interleaved A-D Converters (ADCs). It is known that, in this method, using multiple ADCs enables sampling at a rate higher than the sampling rate of the ADC being used. Degradation of the dynamic range, however, results from such factors as phase error in the sampling clock applied to the ADC, and mismatched frequency characteristics among the individual ADCs. This paper describes a method for correcting these mismatches using a digital signal processing (DSP) technique for automatic test equipment applications. This method can be applied to any number of interleaved ADCs, and it does not require any additional hardware; good correction and improved accuracy can be obtained simply by adding a little to the computing overhead.},
keywords={},
doi={10.1587/transfun.E92.A.374},
ISSN={1745-1337},
month={February},}
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TY - JOUR
TI - Technique to Improve the Performance of Time-Interleaved A-D Converters with Mismatches of Non-linearity
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 374
EP - 380
AU - Koji ASAMI
AU - Takahide SUZUKI
AU - Hiroyuki MIYAJIMA
AU - Tetsuya TAURA
AU - Haruo KOBAYASHI
PY - 2009
DO - 10.1587/transfun.E92.A.374
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E92-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 2009
AB - One method for achieving high-speed waveform digitizing uses time-interleaved A-D Converters (ADCs). It is known that, in this method, using multiple ADCs enables sampling at a rate higher than the sampling rate of the ADC being used. Degradation of the dynamic range, however, results from such factors as phase error in the sampling clock applied to the ADC, and mismatched frequency characteristics among the individual ADCs. This paper describes a method for correcting these mismatches using a digital signal processing (DSP) technique for automatic test equipment applications. This method can be applied to any number of interleaved ADCs, and it does not require any additional hardware; good correction and improved accuracy can be obtained simply by adding a little to the computing overhead.
ER -