The search functionality is under construction.

IEICE TRANSACTIONS on Fundamentals

Technique to Improve the Performance of Time-Interleaved A-D Converters with Mismatches of Non-linearity

Koji ASAMI, Takahide SUZUKI, Hiroyuki MIYAJIMA, Tetsuya TAURA, Haruo KOBAYASHI

  • Full Text Views

    0

  • Cite this

Summary :

One method for achieving high-speed waveform digitizing uses time-interleaved A-D Converters (ADCs). It is known that, in this method, using multiple ADCs enables sampling at a rate higher than the sampling rate of the ADC being used. Degradation of the dynamic range, however, results from such factors as phase error in the sampling clock applied to the ADC, and mismatched frequency characteristics among the individual ADCs. This paper describes a method for correcting these mismatches using a digital signal processing (DSP) technique for automatic test equipment applications. This method can be applied to any number of interleaved ADCs, and it does not require any additional hardware; good correction and improved accuracy can be obtained simply by adding a little to the computing overhead.

Publication
IEICE TRANSACTIONS on Fundamentals Vol.E92-A No.2 pp.374-380
Publication Date
2009/02/01
Publicized
Online ISSN
1745-1337
DOI
10.1587/transfun.E92.A.374
Type of Manuscript
Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category

Authors

Keyword