IEICE TRANSACTIONS on Fundamentals
A Body Bias Generator with Low Supply Voltage for Within-Die Variability Compensation
Summary :
A body bias generator (BBG) for fine-grained body biasing (FGBB) is proposed. The FGBB is effective to reduce variability and power consumption in a system-on-chip (SoC). Since FGBB needs a number of BBGs, the BBG is preferred to be implemented in cell-based design procedure. In the cell-based design, it is inefficient to provide an extra supply voltage for BBGs. We invented a BBG with switched capacitor configuration and it enables BBG to operate with wide range of the supply voltage from 0.6V to 1.2V. We fabricated the BBG in a 65nm CMOS process to control 0.1mm2 of core circuit with the area overhead of 1.4% for the BBG.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E97-A No.3 pp.734-740
- Publication Date
- 2014/03/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1587/transfun.E97.A.734
- Type of Manuscript
- Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
- Category
Authors
Norihiro KAMAE
Kyoto University
Akira TSUCHIYA
Kyoto University
Hidetoshi ONODERA
Kyoto University,JST
Keyword
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Norihiro KAMAE, Akira TSUCHIYA, Hidetoshi ONODERA, "A Body Bias Generator with Low Supply Voltage for Within-Die Variability Compensation" in IEICE TRANSACTIONS on Fundamentals,
vol. E97-A, no. 3, pp. 734-740, March 2014, doi: 10.1587/transfun.E97.A.734.
Abstract: A body bias generator (BBG) for fine-grained body biasing (FGBB) is proposed. The FGBB is effective to reduce variability and power consumption in a system-on-chip (SoC). Since FGBB needs a number of BBGs, the BBG is preferred to be implemented in cell-based design procedure. In the cell-based design, it is inefficient to provide an extra supply voltage for BBGs. We invented a BBG with switched capacitor configuration and it enables BBG to operate with wide range of the supply voltage from 0.6V to 1.2V. We fabricated the BBG in a 65nm CMOS process to control 0.1mm2 of core circuit with the area overhead of 1.4% for the BBG.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E97.A.734/_p
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@ARTICLE{e97-a_3_734,
author={Norihiro KAMAE, Akira TSUCHIYA, Hidetoshi ONODERA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Body Bias Generator with Low Supply Voltage for Within-Die Variability Compensation},
year={2014},
volume={E97-A},
number={3},
pages={734-740},
abstract={A body bias generator (BBG) for fine-grained body biasing (FGBB) is proposed. The FGBB is effective to reduce variability and power consumption in a system-on-chip (SoC). Since FGBB needs a number of BBGs, the BBG is preferred to be implemented in cell-based design procedure. In the cell-based design, it is inefficient to provide an extra supply voltage for BBGs. We invented a BBG with switched capacitor configuration and it enables BBG to operate with wide range of the supply voltage from 0.6V to 1.2V. We fabricated the BBG in a 65nm CMOS process to control 0.1mm2 of core circuit with the area overhead of 1.4% for the BBG.},
keywords={},
doi={10.1587/transfun.E97.A.734},
ISSN={1745-1337},
month={March},}
Copy
TY - JOUR
TI - A Body Bias Generator with Low Supply Voltage for Within-Die Variability Compensation
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 734
EP - 740
AU - Norihiro KAMAE
AU - Akira TSUCHIYA
AU - Hidetoshi ONODERA
PY - 2014
DO - 10.1587/transfun.E97.A.734
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E97-A
IS - 3
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - March 2014
AB - A body bias generator (BBG) for fine-grained body biasing (FGBB) is proposed. The FGBB is effective to reduce variability and power consumption in a system-on-chip (SoC). Since FGBB needs a number of BBGs, the BBG is preferred to be implemented in cell-based design procedure. In the cell-based design, it is inefficient to provide an extra supply voltage for BBGs. We invented a BBG with switched capacitor configuration and it enables BBG to operate with wide range of the supply voltage from 0.6V to 1.2V. We fabricated the BBG in a 65nm CMOS process to control 0.1mm2 of core circuit with the area overhead of 1.4% for the BBG.
ER -
English
