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IEICE TRANSACTIONS on Fundamentals

A Field Programmable Sequencer and Memory with Middle Grained Programmability Optimized for MCU Peripherals

Yoshifumi KAWAMURA, Naoya OKADA, Yoshio MATSUDA, Tetsuya MATSUMURA, Hiroshi MAKINO, Kazutami ARIMOTO

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Summary :

A Field Programmable Sequencer and Memory (FPSM), which is a programmable unit exclusively optimized for peripherals on a micro controller unit, is proposed. The FPSM functions as not only the peripherals but also the standard built-in memory. The FPSM provides easier programmability with a smaller area overhead, especially when compared with the FPGA. The FPSM is implemented on the FPGA and the programmability and performance for basic peripherals such as the 8 bit counter and 8 bit accuracy Pulse Width Modulation are emulated on the FPGA. Furthermore, the FPSM core with a 4K bit SRAM is fabricated in 0.18µm 5 metal CMOS process technology. The FPSM is an half the area of FPGA, its power consumption is less than one-fifth.

Publication
IEICE TRANSACTIONS on Fundamentals Vol.E99-A No.5 pp.917-928
Publication Date
2016/05/01
Publicized
Online ISSN
1745-1337
DOI
10.1587/transfun.E99.A.917
Type of Manuscript
PAPER
Category
VLSI Design Technology and CAD

Authors

Yoshifumi KAWAMURA
  Kanazawa University,SKY Technology Company Limited
Naoya OKADA
  Kanazawa University
Yoshio MATSUDA
  Kanazawa University
Tetsuya MATSUMURA
  Nihon University
Hiroshi MAKINO
  Osaka Institute of Technology
Kazutami ARIMOTO
  Okayama Prefectural University

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