IEICE TRANSACTIONS on Information
Code Assignment Algorithm for Highly Parallel Multiple-Valued Combinational Circuits Based on Partition Theory
Summary :
Design of locally computable combinational circuits is a very important subject to implement high-speed compact arithmetic and logic circuits in VLSI systems. This paper describes a multiple-valued code assignment algorithm for the locally computable combinational circuits, when a functional specification for a unary operation is given by the mapping relationship between input and output symbols. Partition theory usually used in the design of sequential circuits is effectively employed for the fast search for the code assignment problem. Based on the partition theory, mathematical foundation is derived for the locally computable circuit design. Moreover, for permutation operations, we propose an efficient code assignment algorithm based on closed chain sets to reduce the number of combinations in search procedure. Some examples are shown to demonstrate the usefulness of the algorithm.
- Publication
- IEICE TRANSACTIONS on Information Vol.E76-D No.5 pp.548-554
- Publication Date
- 1993/05/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section PAPER (Special Issue on Multiple-Valued Logic)
- Category
- Logic Design
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Keyword
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Saneaki TAMAKI, Michitaka KAMEYAMA, Tatsuo HIGUCHI, "Code Assignment Algorithm for Highly Parallel Multiple-Valued Combinational Circuits Based on Partition Theory" in IEICE TRANSACTIONS on Information,
vol. E76-D, no. 5, pp. 548-554, May 1993, doi: .
Abstract: Design of locally computable combinational circuits is a very important subject to implement high-speed compact arithmetic and logic circuits in VLSI systems. This paper describes a multiple-valued code assignment algorithm for the locally computable combinational circuits, when a functional specification for a unary operation is given by the mapping relationship between input and output symbols. Partition theory usually used in the design of sequential circuits is effectively employed for the fast search for the code assignment problem. Based on the partition theory, mathematical foundation is derived for the locally computable circuit design. Moreover, for permutation operations, we propose an efficient code assignment algorithm based on closed chain sets to reduce the number of combinations in search procedure. Some examples are shown to demonstrate the usefulness of the algorithm.
URL: https://global.ieice.org/en_transactions/information/10.1587/e76-d_5_548/_p
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@ARTICLE{e76-d_5_548,
author={Saneaki TAMAKI, Michitaka KAMEYAMA, Tatsuo HIGUCHI, },
journal={IEICE TRANSACTIONS on Information},
title={Code Assignment Algorithm for Highly Parallel Multiple-Valued Combinational Circuits Based on Partition Theory},
year={1993},
volume={E76-D},
number={5},
pages={548-554},
abstract={Design of locally computable combinational circuits is a very important subject to implement high-speed compact arithmetic and logic circuits in VLSI systems. This paper describes a multiple-valued code assignment algorithm for the locally computable combinational circuits, when a functional specification for a unary operation is given by the mapping relationship between input and output symbols. Partition theory usually used in the design of sequential circuits is effectively employed for the fast search for the code assignment problem. Based on the partition theory, mathematical foundation is derived for the locally computable circuit design. Moreover, for permutation operations, we propose an efficient code assignment algorithm based on closed chain sets to reduce the number of combinations in search procedure. Some examples are shown to demonstrate the usefulness of the algorithm.},
keywords={},
doi={},
ISSN={},
month={May},}
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TY - JOUR
TI - Code Assignment Algorithm for Highly Parallel Multiple-Valued Combinational Circuits Based on Partition Theory
T2 - IEICE TRANSACTIONS on Information
SP - 548
EP - 554
AU - Saneaki TAMAKI
AU - Michitaka KAMEYAMA
AU - Tatsuo HIGUCHI
PY - 1993
DO -
JO - IEICE TRANSACTIONS on Information
SN -
VL - E76-D
IS - 5
JA - IEICE TRANSACTIONS on Information
Y1 - May 1993
AB - Design of locally computable combinational circuits is a very important subject to implement high-speed compact arithmetic and logic circuits in VLSI systems. This paper describes a multiple-valued code assignment algorithm for the locally computable combinational circuits, when a functional specification for a unary operation is given by the mapping relationship between input and output symbols. Partition theory usually used in the design of sequential circuits is effectively employed for the fast search for the code assignment problem. Based on the partition theory, mathematical foundation is derived for the locally computable circuit design. Moreover, for permutation operations, we propose an efficient code assignment algorithm based on closed chain sets to reduce the number of combinations in search procedure. Some examples are shown to demonstrate the usefulness of the algorithm.
ER -
English
