To realize high-speed computations in a residue number system (RNS), an implementation method for residue arithmetic circuits using signed-digit (SD) number representation is proposed. Integers mp = (2p-1) known as Mersenne numbers are used as moduli, so that modulo mp addition can be performed by an end-around-carry SD adder and the addition time is independent of the word length of operands. Using a binary modulo mp SD adder tree, the modulo mp multiplication can be performed in a time proportional to log2p.
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Copy
Shugang WEI, Kensuke SHIMIZU, "Modulo 2p-1 Arithmetic Hardware Algorithm Using Signed-Digit Number Representation" in IEICE TRANSACTIONS on Information,
vol. E79-D, no. 3, pp. 242-246, March 1996, doi: .
Abstract: To realize high-speed computations in a residue number system (RNS), an implementation method for residue arithmetic circuits using signed-digit (SD) number representation is proposed. Integers mp = (2p-1) known as Mersenne numbers are used as moduli, so that modulo mp addition can be performed by an end-around-carry SD adder and the addition time is independent of the word length of operands. Using a binary modulo mp SD adder tree, the modulo mp multiplication can be performed in a time proportional to log2p.
URL: https://global.ieice.org/en_transactions/information/10.1587/e79-d_3_242/_p
Copy
@ARTICLE{e79-d_3_242,
author={Shugang WEI, Kensuke SHIMIZU, },
journal={IEICE TRANSACTIONS on Information},
title={Modulo 2p-1 Arithmetic Hardware Algorithm Using Signed-Digit Number Representation},
year={1996},
volume={E79-D},
number={3},
pages={242-246},
abstract={To realize high-speed computations in a residue number system (RNS), an implementation method for residue arithmetic circuits using signed-digit (SD) number representation is proposed. Integers mp = (2p-1) known as Mersenne numbers are used as moduli, so that modulo mp addition can be performed by an end-around-carry SD adder and the addition time is independent of the word length of operands. Using a binary modulo mp SD adder tree, the modulo mp multiplication can be performed in a time proportional to log2p.},
keywords={},
doi={},
ISSN={},
month={March},}
Copy
TY - JOUR
TI - Modulo 2p-1 Arithmetic Hardware Algorithm Using Signed-Digit Number Representation
T2 - IEICE TRANSACTIONS on Information
SP - 242
EP - 246
AU - Shugang WEI
AU - Kensuke SHIMIZU
PY - 1996
DO -
JO - IEICE TRANSACTIONS on Information
SN -
VL - E79-D
IS - 3
JA - IEICE TRANSACTIONS on Information
Y1 - March 1996
AB - To realize high-speed computations in a residue number system (RNS), an implementation method for residue arithmetic circuits using signed-digit (SD) number representation is proposed. Integers mp = (2p-1) known as Mersenne numbers are used as moduli, so that modulo mp addition can be performed by an end-around-carry SD adder and the addition time is independent of the word length of operands. Using a binary modulo mp SD adder tree, the modulo mp multiplication can be performed in a time proportional to log2p.
ER -