On Testing of Josephson Logic Circuits Composed of the 4JL Gates
Summary :
We have specified typical fabrication defects of the current injection logic gates with four Josephson junctions (4JL gates), and then investigated the voltage and current behavior of defective gates by SPICE simulation to evaluate the defect coverage achieved by logic testing and current testing. The simulation results show that current testing may possibly achieve a high defect coverage while logic testing cannot detect almost half defects.
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- IEICE TRANSACTIONS on Information Vol.E81-D No.7 pp.749-752
- Publication Date
- 1998/07/25
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- Type of Manuscript
- Special Section LETTER (Special Issue on Test and Diagnosis of VLSI)
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Teruhiko YAMADA, Tsuyoshi SASAKI, "On Testing of Josephson Logic Circuits Composed of the 4JL Gates" in IEICE TRANSACTIONS on Information,
vol. E81-D, no. 7, pp. 749-752, July 1998, doi: .
Abstract: We have specified typical fabrication defects of the current injection logic gates with four Josephson junctions (4JL gates), and then investigated the voltage and current behavior of defective gates by SPICE simulation to evaluate the defect coverage achieved by logic testing and current testing. The simulation results show that current testing may possibly achieve a high defect coverage while logic testing cannot detect almost half defects.
URL: https://global.ieice.org/en_transactions/information/10.1587/e81-d_7_749/_p
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@ARTICLE{e81-d_7_749,
author={Teruhiko YAMADA, Tsuyoshi SASAKI, },
journal={IEICE TRANSACTIONS on Information},
title={On Testing of Josephson Logic Circuits Composed of the 4JL Gates},
year={1998},
volume={E81-D},
number={7},
pages={749-752},
abstract={We have specified typical fabrication defects of the current injection logic gates with four Josephson junctions (4JL gates), and then investigated the voltage and current behavior of defective gates by SPICE simulation to evaluate the defect coverage achieved by logic testing and current testing. The simulation results show that current testing may possibly achieve a high defect coverage while logic testing cannot detect almost half defects.},
keywords={},
doi={},
ISSN={},
month={July},}
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TY - JOUR
TI - On Testing of Josephson Logic Circuits Composed of the 4JL Gates
T2 - IEICE TRANSACTIONS on Information
SP - 749
EP - 752
AU - Teruhiko YAMADA
AU - Tsuyoshi SASAKI
PY - 1998
DO -
JO - IEICE TRANSACTIONS on Information
SN -
VL - E81-D
IS - 7
JA - IEICE TRANSACTIONS on Information
Y1 - July 1998
AB - We have specified typical fabrication defects of the current injection logic gates with four Josephson junctions (4JL gates), and then investigated the voltage and current behavior of defective gates by SPICE simulation to evaluate the defect coverage achieved by logic testing and current testing. The simulation results show that current testing may possibly achieve a high defect coverage while logic testing cannot detect almost half defects.
ER -
English
