Design for Hierarchical Two-Pattern Testability of Data Paths
Summary :
This paper introduces the concept of hierarchical testability of data paths for delay faults. A definition of hierarchically two-pattern testable (HTPT) data path is developed. Also, a design for testability (DFT) method is presented to augment a data path to become an HTPT one. The DFT method incorporates a graph-based analysis of an HTPT data path and makes use of some graph algorithms. The proposed method can provide similar advantages to the enhanced scan approach at a much lower hardware overhead cost.
- Publication
- IEICE TRANSACTIONS on Information Vol.E85-D No.6 pp.975-984
- Publication Date
- 2002/06/01
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- PAPER
- Category
- Fault Tolerance
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Keyword
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Md. Altaf-Ul-AMIN, Satoshi OHTAKE, Hideo FUJIWARA, "Design for Hierarchical Two-Pattern Testability of Data Paths" in IEICE TRANSACTIONS on Information,
vol. E85-D, no. 6, pp. 975-984, June 2002, doi: .
Abstract: This paper introduces the concept of hierarchical testability of data paths for delay faults. A definition of hierarchically two-pattern testable (HTPT) data path is developed. Also, a design for testability (DFT) method is presented to augment a data path to become an HTPT one. The DFT method incorporates a graph-based analysis of an HTPT data path and makes use of some graph algorithms. The proposed method can provide similar advantages to the enhanced scan approach at a much lower hardware overhead cost.
URL: https://global.ieice.org/en_transactions/information/10.1587/e85-d_6_975/_p
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@ARTICLE{e85-d_6_975,
author={Md. Altaf-Ul-AMIN, Satoshi OHTAKE, Hideo FUJIWARA, },
journal={IEICE TRANSACTIONS on Information},
title={Design for Hierarchical Two-Pattern Testability of Data Paths},
year={2002},
volume={E85-D},
number={6},
pages={975-984},
abstract={This paper introduces the concept of hierarchical testability of data paths for delay faults. A definition of hierarchically two-pattern testable (HTPT) data path is developed. Also, a design for testability (DFT) method is presented to augment a data path to become an HTPT one. The DFT method incorporates a graph-based analysis of an HTPT data path and makes use of some graph algorithms. The proposed method can provide similar advantages to the enhanced scan approach at a much lower hardware overhead cost.},
keywords={},
doi={},
ISSN={},
month={June},}
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TY - JOUR
TI - Design for Hierarchical Two-Pattern Testability of Data Paths
T2 - IEICE TRANSACTIONS on Information
SP - 975
EP - 984
AU - Md. Altaf-Ul-AMIN
AU - Satoshi OHTAKE
AU - Hideo FUJIWARA
PY - 2002
DO -
JO - IEICE TRANSACTIONS on Information
SN -
VL - E85-D
IS - 6
JA - IEICE TRANSACTIONS on Information
Y1 - June 2002
AB - This paper introduces the concept of hierarchical testability of data paths for delay faults. A definition of hierarchically two-pattern testable (HTPT) data path is developed. Also, a design for testability (DFT) method is presented to augment a data path to become an HTPT one. The DFT method incorporates a graph-based analysis of an HTPT data path and makes use of some graph algorithms. The proposed method can provide similar advantages to the enhanced scan approach at a much lower hardware overhead cost.
ER -
English
