IEICE TRANSACTIONS on Information
Architecture and Evaluation of a Third-Generation RHiNET Switch for High-Performance Parallel Computing
Summary :
RHiNET-3/SW is the third-generation switch used in the RHiNET-3 system. It provides both low-latency processing and flexible connection due to its use of a credit-based flow-control mechanism, topology-free routing, and deadlock-free routing. The aggregate throughput of RHiNET-3/SW is 80 Gbps, and the latency is 140 ns. RHiNET-3/SW also provides a hop-by-hop retransmission mechanism. Simulation demonstrated that the effective throughput at a node in a 64-node torus RHiNET-3 system is equivalent to the effective throughput of a 64-bit 33-MHz PCI bus and that the performance of RHiNET-3/SW almost equals or exceeds the best performance of RHiNET-2/SW, the second-generation switch. Although credit-based flow control requires 26% more gates than rate-based flow control to manage the virtual channels (VCs), it requires less VC memory than rate-based flow control. Moreover, its use in a network system reduces latency and increases the maximum throughput compared to rate-based flow control.
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- IEICE TRANSACTIONS on Information Vol.E86-D No.10 pp.1987-1995
- Publication Date
- 2003/10/01
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- Online ISSN
- DOI
- Type of Manuscript
- Special Section PAPER (Special Issue on Development of Advanced Computer Systems)
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Hiroaki NISHI, Shinji NISHIMURA, Katsuyoshi HARASAWA, Tomohiro KUDOH, Hideharu AMANO, "Architecture and Evaluation of a Third-Generation RHiNET Switch for High-Performance Parallel Computing" in IEICE TRANSACTIONS on Information,
vol. E86-D, no. 10, pp. 1987-1995, October 2003, doi: .
Abstract: RHiNET-3/SW is the third-generation switch used in the RHiNET-3 system. It provides both low-latency processing and flexible connection due to its use of a credit-based flow-control mechanism, topology-free routing, and deadlock-free routing. The aggregate throughput of RHiNET-3/SW is 80 Gbps, and the latency is 140 ns. RHiNET-3/SW also provides a hop-by-hop retransmission mechanism. Simulation demonstrated that the effective throughput at a node in a 64-node torus RHiNET-3 system is equivalent to the effective throughput of a 64-bit 33-MHz PCI bus and that the performance of RHiNET-3/SW almost equals or exceeds the best performance of RHiNET-2/SW, the second-generation switch. Although credit-based flow control requires 26% more gates than rate-based flow control to manage the virtual channels (VCs), it requires less VC memory than rate-based flow control. Moreover, its use in a network system reduces latency and increases the maximum throughput compared to rate-based flow control.
URL: https://global.ieice.org/en_transactions/information/10.1587/e86-d_10_1987/_p
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@ARTICLE{e86-d_10_1987,
author={Hiroaki NISHI, Shinji NISHIMURA, Katsuyoshi HARASAWA, Tomohiro KUDOH, Hideharu AMANO, },
journal={IEICE TRANSACTIONS on Information},
title={Architecture and Evaluation of a Third-Generation RHiNET Switch for High-Performance Parallel Computing},
year={2003},
volume={E86-D},
number={10},
pages={1987-1995},
abstract={RHiNET-3/SW is the third-generation switch used in the RHiNET-3 system. It provides both low-latency processing and flexible connection due to its use of a credit-based flow-control mechanism, topology-free routing, and deadlock-free routing. The aggregate throughput of RHiNET-3/SW is 80 Gbps, and the latency is 140 ns. RHiNET-3/SW also provides a hop-by-hop retransmission mechanism. Simulation demonstrated that the effective throughput at a node in a 64-node torus RHiNET-3 system is equivalent to the effective throughput of a 64-bit 33-MHz PCI bus and that the performance of RHiNET-3/SW almost equals or exceeds the best performance of RHiNET-2/SW, the second-generation switch. Although credit-based flow control requires 26% more gates than rate-based flow control to manage the virtual channels (VCs), it requires less VC memory than rate-based flow control. Moreover, its use in a network system reduces latency and increases the maximum throughput compared to rate-based flow control.},
keywords={},
doi={},
ISSN={},
month={October},}
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TY - JOUR
TI - Architecture and Evaluation of a Third-Generation RHiNET Switch for High-Performance Parallel Computing
T2 - IEICE TRANSACTIONS on Information
SP - 1987
EP - 1995
AU - Hiroaki NISHI
AU - Shinji NISHIMURA
AU - Katsuyoshi HARASAWA
AU - Tomohiro KUDOH
AU - Hideharu AMANO
PY - 2003
DO -
JO - IEICE TRANSACTIONS on Information
SN -
VL - E86-D
IS - 10
JA - IEICE TRANSACTIONS on Information
Y1 - October 2003
AB - RHiNET-3/SW is the third-generation switch used in the RHiNET-3 system. It provides both low-latency processing and flexible connection due to its use of a credit-based flow-control mechanism, topology-free routing, and deadlock-free routing. The aggregate throughput of RHiNET-3/SW is 80 Gbps, and the latency is 140 ns. RHiNET-3/SW also provides a hop-by-hop retransmission mechanism. Simulation demonstrated that the effective throughput at a node in a 64-node torus RHiNET-3 system is equivalent to the effective throughput of a 64-bit 33-MHz PCI bus and that the performance of RHiNET-3/SW almost equals or exceeds the best performance of RHiNET-2/SW, the second-generation switch. Although credit-based flow control requires 26% more gates than rate-based flow control to manage the virtual channels (VCs), it requires less VC memory than rate-based flow control. Moreover, its use in a network system reduces latency and increases the maximum throughput compared to rate-based flow control.
ER -
English
