A Mos Inverter Circuit with Poly-Si Self-Aligned Gate for Educational Purposes to Engineering Students
Summary :
A step-by-step approach to the fabrication and analysis of a p-MOS inverter circuit using poly-Si self-aligned gates outlines a possible experimental course in MOS technology, suitable to run concurrently with the lecture course on semiconductor integrated circuits. The fabrication process which uses oxidation, diffusion and evaporation techniques and two photolithographic process can usually be performed in four afternoon experimental sessions. The capital outlay and actual running cost of the course are modest enough to open almost any engineering department to MOS technology. The basic concepts of the p-n junction, MOS diode, MOS transistor and inverter operation are fully illustrated in the inverter circuit presented.
- Publication
- IEICE TRANSACTIONS on transactions Vol.E62-E No.9 pp.590-594
- Publication Date
- 1979/09/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- PAPER
- Category
- Integrated Circuits
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Katsufusa SHOHNO, "A Mos Inverter Circuit with Poly-Si Self-Aligned Gate for Educational Purposes to Engineering Students" in IEICE TRANSACTIONS on transactions,
vol. E62-E, no. 9, pp. 590-594, September 1979, doi: .
Abstract: A step-by-step approach to the fabrication and analysis of a p-MOS inverter circuit using poly-Si self-aligned gates outlines a possible experimental course in MOS technology, suitable to run concurrently with the lecture course on semiconductor integrated circuits. The fabrication process which uses oxidation, diffusion and evaporation techniques and two photolithographic process can usually be performed in four afternoon experimental sessions. The capital outlay and actual running cost of the course are modest enough to open almost any engineering department to MOS technology. The basic concepts of the p-n junction, MOS diode, MOS transistor and inverter operation are fully illustrated in the inverter circuit presented.
URL: https://global.ieice.org/en_transactions/transactions/10.1587/e62-e_9_590/_p
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@ARTICLE{e62-e_9_590,
author={Katsufusa SHOHNO, },
journal={IEICE TRANSACTIONS on transactions},
title={A Mos Inverter Circuit with Poly-Si Self-Aligned Gate for Educational Purposes to Engineering Students},
year={1979},
volume={E62-E},
number={9},
pages={590-594},
abstract={A step-by-step approach to the fabrication and analysis of a p-MOS inverter circuit using poly-Si self-aligned gates outlines a possible experimental course in MOS technology, suitable to run concurrently with the lecture course on semiconductor integrated circuits. The fabrication process which uses oxidation, diffusion and evaporation techniques and two photolithographic process can usually be performed in four afternoon experimental sessions. The capital outlay and actual running cost of the course are modest enough to open almost any engineering department to MOS technology. The basic concepts of the p-n junction, MOS diode, MOS transistor and inverter operation are fully illustrated in the inverter circuit presented.},
keywords={},
doi={},
ISSN={},
month={September},}
Copy
TY - JOUR
TI - A Mos Inverter Circuit with Poly-Si Self-Aligned Gate for Educational Purposes to Engineering Students
T2 - IEICE TRANSACTIONS on transactions
SP - 590
EP - 594
AU - Katsufusa SHOHNO
PY - 1979
DO -
JO - IEICE TRANSACTIONS on transactions
SN -
VL - E62-E
IS - 9
JA - IEICE TRANSACTIONS on transactions
Y1 - September 1979
AB - A step-by-step approach to the fabrication and analysis of a p-MOS inverter circuit using poly-Si self-aligned gates outlines a possible experimental course in MOS technology, suitable to run concurrently with the lecture course on semiconductor integrated circuits. The fabrication process which uses oxidation, diffusion and evaporation techniques and two photolithographic process can usually be performed in four afternoon experimental sessions. The capital outlay and actual running cost of the course are modest enough to open almost any engineering department to MOS technology. The basic concepts of the p-n junction, MOS diode, MOS transistor and inverter operation are fully illustrated in the inverter circuit presented.
ER -
English
