Gbit/s Programmable Delay-Line IC for High-Speed Pipelining Data Transmission
Summary :
A programmable variable delay-line IC is designed and fabricated for a very-high-speed time-division switching system. The IC has 16-steps 200 ps delay step and multi-Gbit/s operation speed. The IC can be applied to a new pipelining data transmission system having Gbit/s speed. Maximum data transmission speed based on this IC is also calculated.
- Publication
- IEICE TRANSACTIONS on transactions Vol.E72-E No.6 pp.695-697
- Publication Date
- 1989/06/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- LETTER
- Category
- Communication Device and Circuit
Authors
Keyword
Latest Issue
Copyrights notice of machine-translated contents
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Cite this
Copy
Naoaki YAMANAKA, Shiro KIKUCHI, "Gbit/s Programmable Delay-Line IC for High-Speed Pipelining Data Transmission" in IEICE TRANSACTIONS on transactions,
vol. E72-E, no. 6, pp. 695-697, June 1989, doi: .
Abstract: A programmable variable delay-line IC is designed and fabricated for a very-high-speed time-division switching system. The IC has 16-steps 200 ps delay step and multi-Gbit/s operation speed. The IC can be applied to a new pipelining data transmission system having Gbit/s speed. Maximum data transmission speed based on this IC is also calculated.
URL: https://global.ieice.org/en_transactions/transactions/10.1587/e72-e_6_695/_p
Copy
@ARTICLE{e72-e_6_695,
author={Naoaki YAMANAKA, Shiro KIKUCHI, },
journal={IEICE TRANSACTIONS on transactions},
title={Gbit/s Programmable Delay-Line IC for High-Speed Pipelining Data Transmission},
year={1989},
volume={E72-E},
number={6},
pages={695-697},
abstract={A programmable variable delay-line IC is designed and fabricated for a very-high-speed time-division switching system. The IC has 16-steps 200 ps delay step and multi-Gbit/s operation speed. The IC can be applied to a new pipelining data transmission system having Gbit/s speed. Maximum data transmission speed based on this IC is also calculated.},
keywords={},
doi={},
ISSN={},
month={June},}
Copy
TY - JOUR
TI - Gbit/s Programmable Delay-Line IC for High-Speed Pipelining Data Transmission
T2 - IEICE TRANSACTIONS on transactions
SP - 695
EP - 697
AU - Naoaki YAMANAKA
AU - Shiro KIKUCHI
PY - 1989
DO -
JO - IEICE TRANSACTIONS on transactions
SN -
VL - E72-E
IS - 6
JA - IEICE TRANSACTIONS on transactions
Y1 - June 1989
AB - A programmable variable delay-line IC is designed and fabricated for a very-high-speed time-division switching system. The IC has 16-steps 200 ps delay step and multi-Gbit/s operation speed. The IC can be applied to a new pipelining data transmission system having Gbit/s speed. Maximum data transmission speed based on this IC is also calculated.
ER -
English
