An Analysis of Substrate Current in Memory Cell for ULSI SRAM
Summary :
We analyze the substrate corrent of submicron transistors in the memory cell of ULSI SRAMs in the cases of PMOS and NMOS bit line loads. The lifetime of the transistors is also estimated. The SRAM using an NMOS bit load is found to be better as a hot carrier than that with a PMOS bit load.
- Publication
- IEICE TRANSACTIONS on transactions Vol.E73-E No.11 pp.1861-1862
- Publication Date
- 1990/11/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section LETTER (Special Issue on 1990 Autumn Natl. Conv. IEICE)
- Category
- Integrated Circuits
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Keyword
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Yoshiyuki HARAGUCHI, Shuji MURAKAMI, Yasumasa NISHIMURA, Kenji ANAMI, "An Analysis of Substrate Current in Memory Cell for ULSI SRAM" in IEICE TRANSACTIONS on transactions,
vol. E73-E, no. 11, pp. 1861-1862, November 1990, doi: .
Abstract: We analyze the substrate corrent of submicron transistors in the memory cell of ULSI SRAMs in the cases of PMOS and NMOS bit line loads. The lifetime of the transistors is also estimated. The SRAM using an NMOS bit load is found to be better as a hot carrier than that with a PMOS bit load.
URL: https://global.ieice.org/en_transactions/transactions/10.1587/e73-e_11_1861/_p
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@ARTICLE{e73-e_11_1861,
author={Yoshiyuki HARAGUCHI, Shuji MURAKAMI, Yasumasa NISHIMURA, Kenji ANAMI, },
journal={IEICE TRANSACTIONS on transactions},
title={An Analysis of Substrate Current in Memory Cell for ULSI SRAM},
year={1990},
volume={E73-E},
number={11},
pages={1861-1862},
abstract={We analyze the substrate corrent of submicron transistors in the memory cell of ULSI SRAMs in the cases of PMOS and NMOS bit line loads. The lifetime of the transistors is also estimated. The SRAM using an NMOS bit load is found to be better as a hot carrier than that with a PMOS bit load.},
keywords={},
doi={},
ISSN={},
month={November},}
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TY - JOUR
TI - An Analysis of Substrate Current in Memory Cell for ULSI SRAM
T2 - IEICE TRANSACTIONS on transactions
SP - 1861
EP - 1862
AU - Yoshiyuki HARAGUCHI
AU - Shuji MURAKAMI
AU - Yasumasa NISHIMURA
AU - Kenji ANAMI
PY - 1990
DO -
JO - IEICE TRANSACTIONS on transactions
SN -
VL - E73-E
IS - 11
JA - IEICE TRANSACTIONS on transactions
Y1 - November 1990
AB - We analyze the substrate corrent of submicron transistors in the memory cell of ULSI SRAMs in the cases of PMOS and NMOS bit line loads. The lifetime of the transistors is also estimated. The SRAM using an NMOS bit load is found to be better as a hot carrier than that with a PMOS bit load.
ER -
English
