This paper presents the selective epitaxial growth (SEG) properties of reduced pressure chemical vapor deposition (RPCVD) at low temperatures (LT) of 675-725 with high aspect ratio mask of dielectric films. The SEG process could be explained in conjunction with the loading effect, the mask pattern shape/size, and the process parameters of RPCVD. The growth rates showed a large non-uniformity up to 40% depending upon the pattern size of the dielectric mask films, but as the SEG film becomes thicker, the growth rate difference converged on 15% between the narrow 2-µm and the wide 100-µm patterns. The evolution of SEG was controlled dominantly by the surface migration control at the initial stage, and converted to the surface topology control. The design of pattern size and distribution with dummy patterns must be useful to accomplish the reliable and uniform LT-SEG.

The stress effect of SiGe p-type metal oxide semiconductor field effect transistors (MOSFETs) has been investigated to compare their properties associated with the Si0.88Ge0.12/Si epi channels grown on the Si bulk and partially depleted silicon on insulator (PD SOI) substrates. The stress-induced changes in the subthreshold slope and the drain induced barrier lowering were observed small in the SiGe PD SOI in comparison to in the SiGe bulk. Likewise the threshold voltage shift monitored as a function of hot carrier stress time presented excellent stability than in the SiGe PD SOI. Therefore, simply in terms of dc properties, the SiGe PD SOI looks more immune from electrical stresses than the SiGe bulk. However, the 1/f noise properties revealed that the hot carrier stress could introduce lots of generation-recombination noise sources in the SiGe PD SOI. The quality control of oxide-silicon in SOI structures is essential to minimize a possible surge of 1/f noise level due to the hot carrier injection. In order to improve dc and rf performance simultaneously, it is very important to grow the SiGe channels on high quality SOI substrates.