Drain collapse in AlGaN/GaN HFET is analyzed using a two-dimensional device simulator. Two-step saturation is obtained, assuming hole-trap type surface states on the AlGaN surface and a short negative-charge-injected region at the drain side of the gate. Due to the surface electric potential pinning by the surface traps, the negative charge injected region forms a constant potential like in a metal gate region and it acts as an FET with a virtual gate. The electron concentration profile reveals that the first saturation occurs by pinch-off in the virtual gate region and the second saturation occurs by the pinch-off in the metal gate region. Due to the short-channel effect of the virtual gate FET, the saturation current increases until it finally reaches the saturation current of the intrinsic metal gate FET. Current collapses with current degradation at the knee voltage in the I-V characteristics can be explained by the formation of the virtual gate.

The mechanism of current collapse of AlGaN/GaN heterojunction field-effect transistors (HFETs) was investigated by gate bias stress with and without illumination. It is clarified that there are two positions where negative charges accumulate, at the gate edge and in the bulk epi-layer. In the gate-edge mode, the charge comes either through the passivation film or the AlGaN layer, depending on the resistance of the films. Reduction of leakage current in the passivation film will be important to suppress the surface-related collapse.

To improve the high voltage performance of AlGaN/GaN heterojunction field effect transistors (HFETs), we have fabricated AlGaN/GaN HFETs with p-GaN epi-layer on sapphire substrate with an ohmic contact to the p-GaN (p-sub HFET). Substrate bias dependent threshold voltage variation (VT-VSUB) was used to directly determine the doping concentration profile in the buffer layer. This VT-VSUB method was developed from Si MOSFET. For HFETs, the insulator is formed by epitaxially grown and heterogeneous semiconductor layer while for Si MOSFETs the insulator is amorphous SiO2. Except that HFETs have higher channel mobility due to the epitaxial insulator/semiconductor interface, HFETs and Si MOSFETs are basically the same in the respect of device physics. Based on these considerations, the feasibility of this VT-VSUB method for AlGaN/GaN HFETs was discussed. In the end, the buffer layer doping concentration was measured to be 21017 cm-3, p-type, which is well consistent with the Mg concentration obtained from secondary ion mass spectroscopy (SIMS) measurement.

Low-power dry-etching process has been adopted to study the influence of dry-etching on Ohmic contact to p-GaN. When the surface layer of as-grown p-GaN was removed by low-power SiCl4/Cl2-etching, no Ohmic contact can be formed on the low-power dry-etched p-GaN. The same dry-etching process was also applied on n-GaN to understand the influence of the low-power dry-etching process. By capacitance-voltage (C-V) measurement, the Schottky barrier heights (SBHs) of p-GaN and n-GaN were measured. By comparing the change of measured SBHs on p-GaN and n-GaN, it was suggested that etching damage is not the only reason responsible for the degraded Ohmic contacts to dry-etched p-GaN and for Ohmic contact formatin, the original surface layer of as-grown p-GaN have some special properties, which were removed by dry-etching process. To partially recover the original surface of as-grown p-GaN, high temperature annealing (1000C 30 s) was tried on the SiCl4/Cl2-etched p-GaN and Ohmic contact was obtained.