This article presents the CMOS transimpedance amplifier (TIA) for gigabits optical communication, where an analytical method for designing a wideband TIA using different inductive peaking technology is introduced. In this study, we derive and analyze the transfer function (Vout/Iin) of the TIA circuit from the equivalent circuit model. By adding the peaking inductor in different locations, the TIA 3-dB bandwidth can be enhanced without sacrificing the transimpedance gain. These TIA designs have been realized by the advanced CMOS process, and the measured results confirm the predictions from the analytic approach, where the inductive peaking is an useful way to enhance the TIA bandwidth.

The new design with minimum loop inductance suitable for the measurements at high frequencies with substrate bias is described. These test structures allow characterizing 4-terminal MOSFETs with a standard two-port Network Analyzer. The high-frequency behavior of bulk effect in MOSFETs is studied at different bias conditions for a 0.18 µm RF CMOS technology. The BSIM3 extension RF MOSFET modeling with bulk effect is verified and analyzed from two-port Y-parameter results. The result of RF NMOSFET shows that a good accuracy of the 4-terminal RF MOSFET modeling is achieved.

A modified 0.35 µm gate-length MOSFET large-signal microwave device model, based on the widely used BSIM3 model, is presented in this report. This large-signal microwave model includes a BSIM3 model together with the passive components required to fit the device dc and microwave characteristics over a wide range of biasing points and frequency operation. In this report, we propose a methodology to improve the device microwave linearity by controlling a suitable biasing condition, which is based on the predictions of this modified CMOS large-signal model. The input IM3 enhances more than 10 dB at a 2.4 GHz operation. Furthermore, the adjacent channel power ratio also improves 7.5 dB with proper choosing device dc bias.

A high quality-factor of active inductor has been implemented by using the 0.18 µm 1P6M CMOS technologies in this work. By adding a feedback resistance and a regulated gain stage transistor into the conventional cascade-grounded approach, the quality-factor and performance of CMOS active inductor can be improved. This novel active inductor demonstrated a maximum quality-factor of 540 and a 3.2 nH inductance at 4.3 GHz, where the self-resonant frequency was 5.4 GHz. An active CMOS bandpass filter was also fabricated including this tunable high quality factor active inductor, performing an insertion loss of 0.2 dB and a return loss more than 32 dB with a tuning range from 3.45 GHz to 3.6 GHz. The input IP3 was -2.4 dBm, and the noise figure was 14.1 dB with a 28 mW dc power consumption.