This paper presents a novel CMOS readout circuit for satellite infrared time delay and integration (TDI) arrays. An integrate-while-read method is adopted, and a dead-pixel-elimination circuit for solving a critical problem of the TDI scheme is integrated within a chip. In addition, an adaptive charge capacity control method is proposed to improve the signal-to-noise ratio (SNR) for low-temperature targets. The readout circuit was fabricated with a 0.35-µm CMOS process for a 5004 mid-wavelength infrared (MWIR) HgCdTe detector array. Using the circuit, a 90% background-limited infrared photodetection (BLIP) is satisfied over a wide input range (∼200–330 K), and the SNR is improved by 11 dB for the target temperature of 200 K.

This paper presents a novel charge transfer CMOS readout circuit for an X-ray time delay and integration (TDI) array with a depth of 64. In this study, a charge transfer readout scheme based on CMOS technology is proposed to sum 64 stages of the TDI signal. In addition, a dead pixel elimination circuit is integrated within a chip, thus resolving the weakness of TDI arrays related to defective pixels. The proposed method is a novel CMOS solution for large depth TDI arrays. Thus, a high signal-to-noise ratio (SNR) can be acquired due to the increased TDI depth. The readout chip was fabricated with a 0.6 µm standard CMOS process for a 15064 CdTe X-ray detector array. The readout circuit was found to effectively increase the charge storage capacity up to 1.6108 electrons, providing an improved SNR by a factor of approximately 8. The measured equivalent noise charge resulting from the readout circuit was 1.68104 electrons, a negligible value compared to the shot noise from the detector.

For real time image processing, a readout circuit for an infrared focal plane array (IRFPA) involving a new edge detection technique has been proposed in this letter. A non-uniformity correction unit (NUC), essential in an IRFPA because of bad non-uniformity characteristics of IR sensors is eliminated in this circuit by using a noise tolerant edge detection technique. In addition, real time edge detection can be possible, because of pixel-level integration and parallel processing. The proposed readout circuit shows an approximately three to nine times better edge error rate than other available methods using pixel-level parallel processing.