The paper demonstrates a novel multiple-valued logic (MVL) design using a three-peak negative differential resistance (NDR) circuit, which is made of several Si-based metal-oxide-semiconductor field-effect-transistor (MOS) and SiGe-based heterojunction bipolar transistor (HBT) devices. Specifically, this three-peak NDR circuit is biased by two switch-controlled current sources. Compared to the traditional MVL circuit made of resonant tunneling diode (RTD), this multiple-peak MOS-HBT-NDR circuit has two major advantages. One is that the fabrication of this circuit can be fully implemented by the standard BiCMOS process without the need for molecular-beam epitaxy system. Another is that we can obtain more logic states than the RTD-based MVL design. In measuring, we can obtain eight logic states at the output according to a sequent control of two current sources on and off in order.

Numerical analysis of the photoinductive (PI) field mapping technique for characterizing the eddy-current (EC) probes with tilted coils above a thin metal film was investigated using a two-dimensional transient finite element method (FEM). We apply the FEM model of PI method to observe the influence of metal film materials on the field-mapping images used to characterize EC probes. The effects of film thickness on the PI mapping signal are also shown and discussed. The simulation results using the proposed model showed that the PI signals largely depend on the thermal conductivity and the thickness of the thin metal film. The field-mapping signals using the appropriate actual metal film material for EC probe coil with 0°, 5°, 10°, 15°, and 20° tilt angle are also examined. We demonstrate that the higher resolution in field-mapping images of commercial EC probes can be obtained by given higher thermal conductivity and thinner thickness of metal film. The fundamental understanding of distinct field distribution will aid in the selection of the higher-quality EC probe for accurate inspection with EC testing.

A multiple-peak negative differential resistance (NDR) circuit made of standard Si-based metal-oxide-semiconductor field-effect-transistor (MOS) and SiGe-based heterojunction bipolar transistor (HBT) is demonstrated. We can obtain a three-peak I-V curve by connecting three cascoded MOS-HBT-NDR circuits by suitably designing the MOS parameters. This novel three-peak NDR circuit possesses the adjustable current-voltage characteristics and high peak-to-valley current ratio (PVCR). We can adjust the PVCR values to be as high as 11.5, 6.5, and 10.3 for three peaks, respectively. Because the NDR circuit is a very strong nonlinear element, we discuss the extrinsic hysteresis phenomena in this multiple-peak NDR circuit. The effect of series resistance on hysteresis phenomena is also investigated. Our design and fabrication of the NDR circuit is based on the standard 0.35 µm SiGe BiCMOS process.

The paper demonstrates a novel two-peak negative differential resistance (NDR) circuit combining Si-based metal-oxide-semiconductor field-effect-transistor (MOS) and SiGe-based heterojunction bipolar transistor (HBT). Compared to the resonant-tunneling diode, MOS-HBT-NDR has two major advantages in our circuit design. One is that the fabrication of this MOS-HBT-NDR-based application can be fully implemented by the standard BiCMOS process. Another is that the peak current can be effectively adjusted by the controlled voltage. The peak-to-valley current ratio is about 4136 and 9.4 at the first and second peak respectively. It is very useful for circuit designers to consider the NDR-based applications.