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[Author] Goro KODA(3hit)

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  • Detection of Autosymmetry in Logic Functions Using Spectrum Technique

    Ryoji ISHIKAWA  Goro KODA  Kensuke SHIMIZU  

     
    PAPER-Computer System Element

      Vol:
    E86-D No:12
      Page(s):
    2691-2697

    The discrete nature of data in a functional domain can generally be replaced by the global nature of data in the spectrum domain. In this paper we propose a fast procedure to detect autosymmetric function as an application of the spectrum technique. The autosymmetric function differs from the usual symmetric function and strongly relates with EXOR-based representations. It is known that many practical logical networks are autosymmetric, and this nature allows a useful functional class to realize a compact network with EXOR gates. Our procedure is able to detect autosymmetric functions quickly by using spectral coefficients. In experiments, our technique can detect the autosymmetry of most networks with a small number of checks of the spectrum.

  • Easily Testable Realization Based on Single-Rail-Input OR-AND-EXOR Expressions

    Takashi HIRAYAMA  Goro KODA  Yasuaki NISHITANI  Kensuke SHIMIZU  

     
    PAPER-Fault Tolerant Computing

      Vol:
    E82-D No:9
      Page(s):
    1278-1286

    It is known that AND-EXOR two-level networks obtained by AND-EXOR expressions with positive literals are easily testable. They are based on the single-rail-input logic, and require (n+4) tests to detect their single stuck-at faults, where n is the number of the input variables. We present three-level networks obtained from single-rail-input OR-AND-EXOR expressions and propose a more easily testable realization than the AND-EXOR networks. The realization is an OR-AND-EXOR network which limits the fan-in of the AND and OR gates to n/r and r respectively, where r is a constant (1 r n). We show that only (r+n/r) tests are required to detect the single stuck-at faults by adding r extra variables to the network.

  • New Three-Level Boolean Expression Based on EXOR Gates

    Ryoji ISHIKAWA  Takashi HIRAYAMA  Goro KODA  Kensuke SHIMIZU  

     
    PAPER-Computer Components

      Vol:
    E87-D No:5
      Page(s):
    1214-1222

    The utilization of EXOR gates often decreases the number of gates needed for realizing practical logical networks, and enhances the testability of networks. Therefore, logic synthesis with EXOR gates has been studied. In this paper we propose a new logic representation: an ESPP (EXOR-Sum-of-Pseudoproducts) form based on pseudoproducts. This form provides a new three-level network with EXOR gates. Some functional classes in ESPP forms can be realized with shorter expressions than in conventional forms such as the Sum-of-Products. Since many practical functions have the properties of such classes, the ESPP form is useful for making a compact form. We propose a heuristic minimization algorithm for ESPP, and we demonstrate the compactness of ESPPs by showing our experimental results. We apply our technique to some logic function classes and MCNC benchmark networks. The experimental results show that most ESPP forms have fewer literals than conventional forms.