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Toshihide SUZUKI Yasuhiro NAKASHA Hideki KANO Masaru SATO Satoshi MASUDA Ken SAWADA Kozo MAKIYAMA Tsuyoshi TAKAHASHI Tatsuya HIROSE Naoki HARA Masahiko TAKIGAWA
In this paper, we describe the operation of circuits capable of more than 40-Gbit/s that we have developed using InP HEMT technology. For example, we succeeded in obtaining 43-Gbit/s operation for a full-rate 4:1Multiplier (MUX), 50-Gbit/s operation for a Demultiplexer (DEMUX), 50-Gbit/s operation for a D-type flip-flop (D-FF), and a preamplifier with a bandwidth of 40 GHz. In addition, the achievement of 90-Gbit/s operation for a 2:1MUX and a distributed amplifier with over 110-GHz bandwidth indicates that InP HEMT technology is promising for system operations of over 100 Gbit/s. To achieve these results, we also developed several design techniques to improve frequency response above 80 GHz including a symmetric and separated layout of differential elements in the basic SCFL gate and inverted microstrip.