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[Author] Naoki HARA(13hit)

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  • FOREWORD

    Naoki HARA  

     
    FOREWORD

      Vol:
    E98-C No:5
      Page(s):
    381-381
  • Performance Analysis of a 10-Gb/s Millimeter-Wave Impulse Radio Transmitter

    Yasuhiro NAKASHA  Naoki HARA  Kiyomichi ARAKI  

     
    PAPER-Active Devices and Circuits

      Vol:
    E94-C No:10
      Page(s):
    1557-1564

    This paper presents the analytical results of the effects of jitter and intersymbol interference (ISI) on a millimeter-wave impulse radio (IR) transceiver, compared with the performance of a developed 10-Gb/s W-band IR-transmitter prototype. The IR transmitter, which is compact and cost-effective, consists of a pulse generator (PG) that creates an extremely short pulse, a band-pass filter (BPF) that shapes the short pulse to the desired millimeter-wave pulse (wavelet), and an optional power amplifier. The jitters of the PG and ISI from the BPF are a hindrance in making the IR transceiver robust and in obtaining excellent performance. One analysis verified that, because of a novel retiming architecture, the random jitter and the data-dependent jitter from the PG give only a small penalty of < 0.5-dB increase in the signal-to-noise ratio (SNR) for achieving a bit error rate (BER) of < 10-12. An alternative analysis on the effect of ISI from the BPF indicated that using a Gaussian BPF enables a transmission with a BER of < 10-12 up to a data rate of 1.4 times as large as the bandwidth of the BPF, which is twice as high as that of a conventional amplitude shift keying (ASK) system. The analysis also showed that the IR system is more sensitive to the ISI than the ASK system and suggested that the mismatching of the skirt characteristics of the developed BPF with those of a Gaussian BPF causes tail lobes following the wavelet, resulting in an on/off ratio of 15 dB and hence, an SNR penalty of 6 dB.

  • Over 40-Gbit/s InP HEMT ICs for Optical Communication Systems

    Toshihide SUZUKI  Yasuhiro NAKASHA  Hideki KANO  Masaru SATO  Satoshi MASUDA  Ken SAWADA  Kozo MAKIYAMA  Tsuyoshi TAKAHASHI  Tatsuya HIROSE  Naoki HARA  Masahiko TAKIGAWA  

     
    INVITED PAPER

      Vol:
    E86-C No:10
      Page(s):
    1916-1922

    In this paper, we describe the operation of circuits capable of more than 40-Gbit/s that we have developed using InP HEMT technology. For example, we succeeded in obtaining 43-Gbit/s operation for a full-rate 4:1Multiplier (MUX), 50-Gbit/s operation for a Demultiplexer (DEMUX), 50-Gbit/s operation for a D-type flip-flop (D-FF), and a preamplifier with a bandwidth of 40 GHz. In addition, the achievement of 90-Gbit/s operation for a 2:1MUX and a distributed amplifier with over 110-GHz bandwidth indicates that InP HEMT technology is promising for system operations of over 100 Gbit/s. To achieve these results, we also developed several design techniques to improve frequency response above 80 GHz including a symmetric and separated layout of differential elements in the basic SCFL gate and inverted microstrip.

  • Beyond 110 GHz InP-HEMT Based Mixer Module Using Flip-Chip Assembly for Precise Spectrum Analysis

    Shoichi SHIBA  Masaru SATO  Hiroshi MATSUMURA  Yoichi KAWANO  Tsuyoshi TAKAHASHI  Toshihide SUZUKI  Yasuhiro NAKASHA  Taisuke IWAI  Naoki HARA  

     
    PAPER

      Vol:
    E98-C No:12
      Page(s):
    1112-1119

    A wide-bandwidth fundamental mixer operating at a frequency above 110GHz for precise spectrum analysis was developed using the InP HEMT technology. A single-ended resistive mixer was adopted for the mixer circuit. An IF amplifier and LO buffer amplifier were also developed and integrated into the mixer chip. As for packaging into a metal block module, a flip-chip bonding technique was introduced. Compared to face-up mounting with wire connections, flip-chip bonding exhibited good frequency flatness in signal loss. The mixer module with a built-in IF amplifier achieved a conversion gain of 5dB at an RF frequency of 135GHz and a 3-dB bandwidth of 35GHz. The mixer module with an LO buffer amplifier operated well even at an LO power of -20dBm.

  • Simulation Study of Short-Channel Effect in MOSFET with Two-Dimensional Materials Channel

    Naoki HARADA  Shintaro SATO  Naoki YOKOYAMA  

     
    BRIEF PAPER-Semiconductor Materials and Devices

      Vol:
    E98-C No:3
      Page(s):
    283-286

    The short-channel effect (SCE) in a MOSFET with an atomically thin MoS$_{2}$ channel was studied using a TCAD simulator. We derived the surface potential roll-up, drain-induced barrier lowering (DIBL), threshold voltage, and subthreshold swing (SS) as indexes of the SCE and analyzed their dependency on the channel thickness (number of atomic layers) and channel length. The minimum scalable channel length for a one-atomic-layer-thick MoS$_{2}$ MOSFET was determined from the threshold voltage roll-off to be 7.6,nm. The one-layer-thick device showed a small DIBL of 87,mV/V at a 20 nm gate length. By using high-k gate insulator, an SS lower than 70,mV/dec is achievable in sub-10-nm-scale devices.

  • N-InAlAs/InGaAs HEMT DCFL Inverter Fabricated Using Pt-Based Gate and Photochemical Dry Etching

    Naoki HARADA  Shigeru KURODA  Kohki HIKOSAKA  

     
    PAPER

      Vol:
    E75-C No:10
      Page(s):
    1165-1171

    A Pt-based gate and photochemical dry etching were developed to fabricate N-InAlAs/InGaAs HEMT ICs. The N-InAlAs/Pt contact showed a Schottky barrier at 0.82 eV, about 0.3 eV larger than ΔEc, and nearly ideal I-V characteristics. Its main disadvantage was the excess penetration of Pt into InAlAs. We proposed a thin-Pt/Ti/Au multilayer gate, more thermally stable than the thick-Pt gate, where Ti layer suppresses the above problem with Pt. The multilayer gate also showed a Schottky barrier (φ) of 0.83 eV and an edeality dactor of 1.1. The high φ value makes it possible to fabricate an E-mode N-InAlAs/InGaAs HEMT. We also developed photochemical selective dry etching using CH3Br gas and a low-pressure mercury lamp. The etching selectivity was 25 at an etch rate of 17 nm/min for InGaAs and 0.7 nm/min for InAlAs. The 1.2-µm-gate E-mode HEMT fabricated using the Pt-based gate and photochemical etching had an excellent peak transconductance of 620 mS/mm with a threshold voltage of +0.03 V. The standard deviation of the threshold voltage of E-mode HEMTs on a 2-inch wafer was 20 mV at an average of +0.088 V. These results indicate the effectiveness of the Pt-based gate and photochemical etching for fabricating N-InAlAs/InGaAs HEMT ICs.

  • Uniform/Selective Heating Microwave Oven Using High Efficiency GaN-on-GaN HEMT Power Amplifier

    Masaru SATO  Yusuke KUMAZAKI  Naoya OKAMOTO  Toshihiro OHKI  Naoko KURAHASHI  Masato NISHIMORI  Atsushi YAMADA  Junji KOTANI  Naoki HARA  Keiji WATANABE  

     
    PAPER-Microwaves, Millimeter-Waves

      Pubricized:
    2023/04/13
      Vol:
    E106-C No:10
      Page(s):
    605-613

    A high-efficiency uniform/selective heating microwave oven was developed. Because the power amplifier requires high-efficiency characteristics to function as a microwave source, a free-standing Gallium Nitride (GaN) substrate was applied in this study. By applying a harmonic tuning circuit, an output power of 71 W and PAE of 73% were achieved in pulsed operation, and an output power of 63 W and PAE of 69% were achieved in CW operation. Moreover, we fabricated a prototype PA module that consists of an oscillator, a driver amplifier, PA, and other RF circuits. The output power was controlled by pulse width modulation to maintain high efficiency regardless of output power. We evaluated the arrangement of antenna polarizations to isolate each antenna. By suppressing the interference of output from adjacent antennas, it is possible to irradiate the object on the top surface of the antenna, thereby demonstrating heating characteristics with small temperature unevenness. The prototype microwave oven successfully demonstrated uniform/selective heating.

  • High-Efficiency 250-320GHz Power Amplifiers Using InP-Based Metal-Oxide-Semiconductor High-Electron-Mobility Transistors

    Yusuke KUMAZAKI  Shiro OZAKI  Naoya OKAMOTO  Naoki HARA  Yasuhiro NAKASHA  Masaru SATO  Toshihiro OHKI  

     
    PAPER

      Pubricized:
    2023/08/22
      Vol:
    E106-C No:11
      Page(s):
    661-668

    This work shows a broadband, high-efficiency power amplifier (PA) monolithic microwave integrated circuit (MMIC) that uses InP-based metal-oxide-semiconductor (MOS) high-electron-mobility transistors (HEMTs) with an extended drain-side access region and broadband conjugate matching topology. Advanced device technologies, namely, double-side-doped structures, MOS gate structures, and asymmetric gate recess, were adopted, and the length of the drain-side access region was optimized to simultaneously obtain high power and efficiency. A common-source PA MMIC based on InP-based MOS-HEMTs was fabricated, and an interstage circuit was designed to maximize the S21 per unit stage in the broadband, resulting in a record-high power-added efficiency and wide bandwidth.

  • Robust Q-Band InP- and GaN-HEMT Low Noise Amplifiers

    Masaru SATO  Yoshitaka NIIDA  Toshihide SUZUKI  Yasuhiro NAKASHA  Yoichi KAWANO  Taisuke IWAI  Naoki HARA  Kazukiyo JOSHIN  

     
    PAPER

      Vol:
    E100-C No:5
      Page(s):
    417-423

    We report on robust and low-power-consumption InP- and GaN-HEMT Low-Noise-Amplifiers (LNAs) operating in Q-band frequency range. A multi-stage common-gate (CG) amplifier with current reuse topology was used. To improve the survivability of the CG amplifier, we introduced a feedback resistor at the gate bias feed. The design technique was adapted to InP- and GaN-HEMT LNAs. The 75nm gate length InP HEMT LNA exhibited a gain of 18dB and a noise figure (NF) of 3dB from 33 to 50GHz. The DC power consumption was 16mW. The Robustness of the InP HEMT LNA was tested by injecting a millimeter-wave input power of 13dBm for 10 minutes. No degradation in a small signal gain was observed. The fabricated 0.12µm gate length GaN HEMT LNA exhibited a gain of 15dB and an NF of 3.2dB from 35 to 42GHz. The DC power consumption was 280mW. The LNA survived until an input power of 28dBm.

  • InGaP-Channel Field Effect Transistors with High Breakdown Voltage

    Naoki HARA  Yasuhiro NAKASHA  Toshihide KIKKAWA  Kazukiyo JOSHIN  Yuu WATANABE  Hitoshi TANAKA  Masahiko TAKIKAWA  

     
    INVITED PAPER-Hetero-FETs & Their Integrated Circuits

      Vol:
    E84-C No:10
      Page(s):
    1294-1299

    We have developed InGaP-channel field effect transistors (FETs) with high breakdown voltages that can be fabricated by using conventional GaAs FET fabrication processes. The buffer and barrier layers were also optimized for the realization of high-voltage operation. The InGaP-channel FET has an extremely high on-state drain-to-source breakdown voltage of over 40 V, and a gate-to-drain breakdown voltage of 55 V. This enabled high-voltage large-signal operation at 40 V. The third-order intermodulation distortion of the InGaP channel FETs was 10-20 dB lower than that of an equivalent GaAs-channel FET, due to the high operating voltage.

  • Nonalloyed Ohmic Contacts for HEMTs Using n+-lnGaAs Layers Grown by MOVPE

    Mizuhisa NIHEI  Naoki HARA  Haruyoshi SUEHIRO  Shigeru KURODA  

     
    PAPER

      Vol:
    E77-C No:9
      Page(s):
    1431-1436

    We fabricated and investigated HEMTs with nonalloyed ohmic contacts using highly conductive n+-ln0.5Ga0.5 As contact layers. We optimized the growth condition of n+-In0.5 Ga0.5As contact layers by MOVPE. Using WSi/W nonalloyed ohmic electrodes, we fabricated InGaP/InGaAs/GaAs pseudomorphic HEMTs with thermal stability of 500 for 30 minutes. In order to examine the scalability of HEMT devices, we tried to reduce the total size of HEMT devices to 3.2 µm using nonalloyed ohmic electrodes, which is the smallest value as far as we know. We could reduce the nonalloyed ohmic contact length Loh to 0.4 µm without degrading the device characteristics. Reducing the n+-In0.5Ga0.5As contact length LIGA to l µm however, decreased the transconductance gm by about 20%. We found that the scaling of the conventional nonalloyed HEMT structure is limited by LIGA.

  • 0. 1 µm-Gate InGaP/InGaAs HEMT Technology for Millimeter-Wave Applications

    Naoki HARADA  Tamio SAITO  Hideyuki OIKAWA  Yoji OHASHI  Yuji AWANO  Masayuki ABE  Kohki HIKOSAKA  

     
    PAPER-Semiconductor Devices and Amplifiers

      Vol:
    E81-C No:6
      Page(s):
    876-881

    This paper describes our new technology for creating a highly productive 0. 1 µm gate InGaP/InGaAs HEMT with a GaAs substrate for a millimeter-wave MMIC. We applied a phase-shifting photo lithographic technique and sidewall deposition/etching process to fabricate a 0. 1 µm gate electrode. The fabricated HEMTs showed excellent high-frequency performance; An MSG exceeding 10 dB at 60 GHz. We also fabricated a 60 GHz band, four-stage low-noise amplifier MMIC and demonstrated its superior performance (Gain= 27 dB and NF= 3. 1 dB @61 GHz). These results strongly suggest that our InGaP/InGaAs HEMTs technologies are highly applicable for millimeter-wave applications.

  • 300-GHz Amplifier in 75-nm InP HEMT Technology

    Hiroshi MATSUMURA  Yoichi KAWANO  Shoichi SHIBA  Masaru SATO  Toshihide SUZUKI  Yasuhiro NAKASHA  Tsuyoshi TAKAHASHI  Kozo MAKIYAMA  Taisuke IWAI  Naoki HARA  

     
    PAPER

      Vol:
    E99-C No:5
      Page(s):
    528-534

    We developed a 300-GHz high gain amplifier MMIC in 75-nm InP high electron mobility transistor technology. We approached the issues with accurate characterization of devices to design the amplifier. The on-wafer through-reflect-line calibration technique was used to obtain accurate transistor characteristics. To increase measurement accuracy, a highly isolated structure was used for on-wafer calibration standards. The common source amplifier topology was used for achieving high gain amplification. The implemented amplifier MMIC exhibited a gain of over 25 dB in the 280-310-GHz frequency band.