The paper presents capability of signal detection for realizing coexistence between broadband wireless access (BWA) systems and ultra wideband (UWB) devices. The capability is experimentally evaluated for baseband signals of downlink (DL) in both mobile WiMAX and 3GPP LTE. An UWB receiver based on fast Fourier transform (FFT) compliant with MB-OFDM standard is implemented as a detector of the BWA signals. The capability is evaluated in terms of elapsed time required to achieve signal detection with probability of 99% by the implemented FFT-based UWB receiver at different conditions of the receiver. Decisions on the signal detection are made by the simplest method which is by setting a threshold which is determined by noise floor of the receiver as reference. The experiments have been conducted though baseband signals for both AWGN and multipath fading channels without any synchronization between the DL signals and UWB receiver. In AWGN environment, results show that the elapsed time depends on the duty ratio of the DL signal to be detected, however, the correlation between the required time and duty ratio is not linear since their envelopes of the DL signals are not constant. In multipath fading environments based on channel models commonly employed as mobile radio environments, the required time for the signal detection becomes as 17 times longer than that in AWGN due to its signal attenuation. For robust signal detection in multipath fading environments, it has been revealed that the number of quantization bits at ADC is crucial through the experiments.

The transmission and processing of multimedia information requires a high-speed communications network infrastructure. This is especially true for the networks between the user's computer and the information highway. An Ethernet LAN is widely used for these networks, but it has limited throughput. Asynchronous Transfer Mode (ATM) LAN technology is a promising approach to overcome this limitation. We have developed a chip set which can be used to connect personal computers (PCs) and workstations (WSs) to a 156-Mbps ATM LAN. The advanced architecture, optimized performance and efficient buffer management enables a sustained more than 100 Mbps transfer speed to be obtained. The chip set is implemented in a 0.8 µm triple metal-layer CMOS process to integrate total 460 K transistors and consumes total 4 W at 5 V.