This paper presents an accurate and systematic method to model the equivalent circuit of pulse generator in the electrical fast transients/burst test (EFT/B). Firstly, a new analytical expression is presented to express the generator's charging and discharging process under open-condition (1000-Ω), which all its coefficients are determined according to the output waveform specified by the manufacturer. And then, with adoption of the step source, the transfer function of the pulse forming network in Laplace domain is deduced, which is ready for the network synthesis. Based on above discussion, the parameterized method and the technique of constant-resistance are adopted for the network synthesis. Finally, the equivalent circuit is renormalized and improved to meet the specification under matching-condition (50-Ω). In this way, the equivalent circuit of EFT/B generator is obtained and can be adjusted conveniently to satisfy the different manufacturers. The PSPICE simulation with a certain load is validated by measurement.

A single solid-state magnetic sensor can be used to measure a current by sensing the field near the conductor in a non-contact way. In order to improve the accuracy of the measuring system, magnetic sensor arrays have been introduced in the current measurement around the conductor. An analytical algorithm based on Discrete Fourier Transform (DFT) is presented in this paper, which can separate the effects of the field generated by the current under measurement from the interference fields. A general mathematical model of the interference analysis is set up, which can be used for both DC and AC current measurement and has no restriction on the shape and number of the current conductors. Numerical simulations associated with preliminary experimental results confirm the validity of the approach.

This paper is devoted to simulate the arc movement in the quenching chamber of the low-voltage circuit breaker. Based on a group of governing equations, a three-dimensional (3-D) arc model is built and solved by a modified commercial code. According to the simulated results, some phenomena such as a 'bulge' in front of the arc column, a tail in the rear of the arc column, arc shrinkage near the electrodes and arc movement characteristics versus different chamber configuration and external magnetic field are found, and the mechanism of the above phenomena is described in detail. Finally, in order to verify the simulation results, arc movement is investigated by hi-spec motion analyzer experimentally.

This paper presents an accurate and systematic method to simulate the interference imposed on the input/output (I/O) ports of electronic equipment under the electrical fast transients/burst (EFT/B) test. The equivalent circuit of the EFT/B generator and the coupling clamp are modeled respectively. Firstly, a transfer function (TF) of the EFT pulse-forming network is constructed with the latent parameters based on circuit theory. In the TF, two negative real parameters characterize the non-oscillation process of the network while one complex conjugate pair characterizes the damping-oscillation process. The TF of the pulse-forming network is therefore synthesized in the equivalent circuit of the EFT/B generator. Secondly, the standard coupling clamp is modeled based on the scatter (S) parameter obtained by using a vector network analyzer. By applying the vector fitting method during the rational function approximation, a macromodel of the coupling clamp can be obtained and converted to a Spice compatible equivalent circuit. Based on the aforementioned procedures, the interference imposed on the I/O ports can be simulated. The modeling methods are validated experimentally, where the interference in differential mode and common mode is evaluated respectively.

Self-updating encryption (SUE) is a new cryptographic scheme produced in the recent work of Lee, Choi, Lee, Park and Yung (Asiacrypt 2013) to achieve a time-updating mechanism for revocation. In SUE, a ciphetext and a private key are associated with the time and a user can decrypt a ciphertext only if its time is earlier than that of his private key. But one drawback is the encryption computational overhead scales with the size of the time which makes it a possible bottleneck for some applications. To address this problem, we provide a new technique for the SUE that splits the encryption algorithm into two phases: an offline phase and an online phase. In the offline phase, an intermediate ciphertext header is generated before it knows the concrete encryption time. Then an online phase is implemented to rapidly generate an SUE ciphertext header when the time becomes known by making use of the intermediate ciphertext header. In addition, two different online encryption constructions are proposed in view of different time level taking 50% as the boundary. At last, we prove the security of our scheme and provide the performance analysis which shows that the vast majority of computational overhead can be moved to the offline phase. One motivating application for this technique is resource-constrained mobile devices: the preparation work can be done when the mobile devices are plugged into a power source, then they can later rapidly perform SUE operations on the move without significantly consuming the battery.