The search functionality is under construction.
The search functionality is under construction.

Author Search Result

[Author] Ken NAKAHARA(2hit)

1-2hit
  • An Evaluation of a New Type of High Efficiency Hybrid Gate Drive Circuit for SiC-MOSFET Suitable for Automotive Power Electronics System Applications Open Access

    Masayoshi YAMAMOTO  Shinya SHIRAI  Senanayake THILAK  Jun IMAOKA  Ryosuke ISHIDO  Yuta OKAWAUCHI  Ken NAKAHARA  

     
    INVITED PAPER

      Pubricized:
    2021/11/26
      Vol:
    E105-A No:5
      Page(s):
    834-843

    In response to fast charging systems, Silicon Carbide (SiC) power semiconductor devices are of great interest of the automotive power electronics applications as the next generation of fast charging systems require high voltage batteries. For high voltage battery EVs (Electric Vehicles) over 800V, SiC power semiconductor devices are suitable for 3-phase inverters, battery chargers, and isolated DC-DC converters due to their high voltage rating and high efficiency performance. However, SiC-MOSFETs have two characteristics that interfere with high-speed switching and high efficiency performance operations for SiC MOS-FET applications in automotive power electronics systems. One characteristic is the low voltage rating of the gate-source terminal, and the other is the large internal gate-resistance of SiC MOS-FET. The purpose of this work was to evaluate a proposed hybrid gate drive circuit that could ignore the internal gate-resistance and maintain the gate-source terminal stability of the SiC-MOSFET applications. It has been found that the proposed hybrid gate drive circuit can achieve faster and lower loss switching performance than conventional gate drive circuits by using the current source gate drive characteristics. In addition, the proposed gate drive circuit can use the voltage source gate drive characteristics to protect the gate-source terminals despite the low voltage rating of the SiC MOS-FET gate-source terminals.

  • Deep-Donor-Induced Suppression of Current Collapse in an AlGaN-GaN Heterojunction Structure Grown on Si Open Access

    Taketoshi TANAKA  Norikazu ITO  Shinya TAKADO  Masaaki KUZUHARA  Ken NAKAHARA  

     
    PAPER-Semiconductor Materials and Devices

      Pubricized:
    2019/10/11
      Vol:
    E103-C No:4
      Page(s):
    186-190

    TCAD simulation was performed to investigate the material properties of an AlGaN/GaN structure in Deep Acceptor (DA)-rich and Deep Donor (DD)-rich GaN cases. DD-rich semi-insulating GaN generated a positively charged area thereof to prevent the electron concentration in 2DEG from decreasing, while a DA-rich counterpart caused electron depletion, which was the origin of the current collapse in AlGaN/GaN HFETs. These simulation results were well verified experimentally using three nitride samples including buffer-GaN layers with carbon concentration ([C]) of 5×1017, 5×1018, and 4×1019 cm-3. DD-rich behaviors were observed for the sample with [C]=4×1019 cm-3, and DD energy level EDD=0.6 eV was estimated by the Arrhenius plot of temperature-dependent IDS. This EDD value coincided with the previously estimated EDD. The backgate experiments revealed that these DD-rich semi-insulating GaN suppressed both current collapse and buffer leakage, thus providing characteristics desirable for practical usage.