This paper proposes a topology of high power, MHz-frequency, half-bridge resonant inverter ideal for low-loss Gallium Nitride high electron mobility transistor (GaN-HEMT). General GaN-HEMTs have drawback of low drain-source breakdown voltage. This property has prevented conventional high-frequency series resonant inverters from delivering high power to high resistance loads such as 50Ω, which is typically used in radio frequency (RF) systems. High resistance load causes hard-switching also and reduction of power efficiency. The proposed topology overcomes these difficulties by utilizing a proposed ‘L-S network’. This network is effective combination of a simple impedance converter and a series resonator. The proposed topology provides not only high power for high resistance load but also arbitrary design of output wattage depending on impedance conversion design. In addition, the current through the series resonator is low in the L-S network. Hence, this series resonator can be designed specifically for harmonic suppression with relatively high quality-factor and zero reactance. Low-distortion sinusoidal 3kW output is verified in the proposed inverter at 13.56MHz by computer simulations. Further, 99.4% high efficiency is achieved in the power circuit in 471W experimental prototype.

This paper proposes an analytical model of maximum operating frequency of class-D zero-voltage-switching (ZVS) inverter. The model includes linearized drain-source parasitic capacitance and any duty ratio. The nonlinear drain-source parasitic capacitance is equally linearized through a charge-related equation. The model expresses the relationship among frequency, shunt capacitance, duty ratio, load impedance, output current phase, and DC input voltage under the ZVS condition. The analytical result shows that the maximum operating frequency under the ZVS condition can be obtained when the duty ratio, the output current phase, and the DC input voltage are set to optimal values. A 650 V/30 A SiC-MOSFET is utilized for both simulated and experimental verification, resulting in good consistency.

In response to fast charging systems, Silicon Carbide (SiC) power semiconductor devices are of great interest of the automotive power electronics applications as the next generation of fast charging systems require high voltage batteries. For high voltage battery EVs (Electric Vehicles) over 800V, SiC power semiconductor devices are suitable for 3-phase inverters, battery chargers, and isolated DC-DC converters due to their high voltage rating and high efficiency performance. However, SiC-MOSFETs have two characteristics that interfere with high-speed switching and high efficiency performance operations for SiC MOS-FET applications in automotive power electronics systems. One characteristic is the low voltage rating of the gate-source terminal, and the other is the large internal gate-resistance of SiC MOS-FET. The purpose of this work was to evaluate a proposed hybrid gate drive circuit that could ignore the internal gate-resistance and maintain the gate-source terminal stability of the SiC-MOSFET applications. It has been found that the proposed hybrid gate drive circuit can achieve faster and lower loss switching performance than conventional gate drive circuits by using the current source gate drive characteristics. In addition, the proposed gate drive circuit can use the voltage source gate drive characteristics to protect the gate-source terminals despite the low voltage rating of the SiC MOS-FET gate-source terminals.