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[Author] Kenji MUKAI(4hit)

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  • Design and Measurements of Two-Gain-Mode GaAs-BiFET MMIC Power Amplifier Modules with Small Phase Discontinuity for WCDMA Data Communications

    Kazuya YAMAMOTO  Miyo MIYASHITA  Kenji MUKAI  Shigeru FUJIWARA  Satoshi SUZUKI  Hiroaki SEKI  

     
    PAPER-Microwaves, Millimeter-Waves

      Vol:
    E101-C No:1
      Page(s):
    65-77

    This paper describes the design and measurements of two-gain-mode MMIC power amplifier modules (PAMs) for Band 1 and Band 5 WCDMA data communications. The PAMs are based on the two-stage single-chain amplifier topology with an L-shaped FET step attenuator (ATT) placed at the interstage, featuring not only high-efficiency operation but also both a small phase discontinuity and a small input return loss variation between the two gain modes: a high-gain mode (0-dB thru state for the ATT) and a low-gain mode (14-dB attenuation state for the ATT). The PAMs are assembled on a 3 mm × 3 mm FR-4 laminate together with several surface mount devices, and a high-directivity, 20-dB bilayer-type directional coupler is integrated on the laminate for accurate forward-power monitoring even under a 2.5:1-VSWR load mismatching condition. To validate the design and analysis for the PAMs using the L-shaped ATT, two PAM products — a Band 1 PAM and a Band 5 PAM — were fabricated using our in-house GaAs-BiFET process. The main RF measurements under the condition of a WCDMA (R99) modulated signal and a 3.4-V supply voltage are as follows. The Band 1 PAM can deliver a power-added efficiency (PAE) as high as 46% at an output power (Pout) of 28.25 dBm while maintaining a ±5-MHz-offset adjacent channel power ratio (ACLR1) of approximately -40 dBc or less and a small phase discontinuity of less than 5°. The Band 5 PAM can also deliver a high PAE of 46% at the same Pout and ACLR1 levels with small phase discontinuity of less than 4°. This small discontinuity is due to the phase-shift compensation capacitance embedded in the ATT. The measured input return loss is well maintained at better than 10 dB at the two modes. In addition, careful coupler design achieves a small detection error of less than 0.5 dB even under a 2.5:1-VSWR load mismatching condition.

  • Recent Progress in Envelope Tracking Power Amplifiers for Mobile Handset Systems Open Access

    Kenji MUKAI  Hiroshi OKABE  Satoshi TANAKA  

     
    INVITED PAPER

      Pubricized:
    2021/03/19
      Vol:
    E104-C No:10
      Page(s):
    516-525

    The Fifth-Generation new radio (5G NR) services that started in 2020 in Japan use a higher peak-to-average power ratio (PAPR) of a modulated signal with a maximum bandwidth of up to 100MHz and support multi-input/multi-output (MIMO) systems even in mobile handsets, compared to the Third-Generation (3G) and/or Fourth-Generation (4G) handsets. The 5G NR requires wideband operation for power amplifiers (PAs) used in handsets under a high PAPR signal condition. The 5G NR also requires a number of operating bands for the handsets. These requirements often cause significand degradation of the PA efficiency, consequently. The degradation is due to wideband and/or high PAPR operation as well as additional front-end loss between a PA and an antenna. Thus, the use of an efficiency enhancement technique is indispensable to 5G NR handset PAs. An envelope tracking (ET) is one of the most effective ways to improve the PA efficiency in the handsets. This paper gives recent progress in ET power amplifiers (ETPAs) followed by a brief introduction of ET techniques. The introduction describes a basic operation for an ET modulator that is a key component in the ET techniques and then gives a description of some kinds of ET modulators. In addition, as an example of a 5G NR ETPA, the latest experimental results for a 5G ETPA prototype are demonstrated while comparing overall efficiency of the ET modulator and PA in the ET mode with that in the average power tracking (APT) mode.

  • Evolution of Power Amplifiers for Mobile Phone Terminals from the 2nd Generation to the 5th Generation Open Access

    Satoshi TANAKA  Kenji MUKAI  Shohei IMAI  Hiroshi OKABE  

     
    INVITED PAPER

      Pubricized:
    2022/03/22
      Vol:
    E105-C No:10
      Page(s):
    421-432

    Mobile phone systems continue to evolve from the 2nd generation, which began in the early 1990s, to the 5th generation, which is now in service. Along with this evolution, the power amplifier (PA) is also evolved. The characteristics required for PA are changing with each generation. In this paper, we will give an overview of the evolution of PAs from the 2nd generation mobile phones such as GSM (global system for mobile communications) to the 5th generation mobile phones that is often called NR (new radio), in particular, the circuit system. Specifically, the following five items will be described. (1) Ramp-up and ramp-down power control circuit corresponding to GSM, (2) Self-bias circuit technology for improving linearity that becomes important after W-CDMA (wideband code division multiple access), (3) Power mode switching methods for improving efficiency at low output power, (4) Power combining methods that have become important since LTE (long term evolution), and (5) Backoff efficiency improvement methods represented by ET (envelop tracking) and Doherty PA.

  • Design Optimization of a High-Speed, Area-Efficient and Low-Power Montgomery Modular Multiplier for RSA Algorithm

    Shoichi MASUI  Kenji MUKAIDA  Masahiko TAKENAKA  Naoya TORII  

     
    PAPER-Digital

      Vol:
    E88-C No:4
      Page(s):
    576-581

    High-speed, area-efficient, and low-power Montgomery modular multipliers for RSA algorithm have been developed for digital signature and user authentication in high-speed network systems and smart card LSIs. The multiplier-accumulators (MAC) in the developed Montgomery modular multipliers have a non-identical multiplicand/multiplier word length organization. This organization can eliminate the bandwidth bottleneck associated with a data memory, and enables to use a single-port memory for area and power reductions. The developed MAC is faster than the conventional identical word length organization due to the shortened critical path. For smart card applications, an area-efficient architecture with 42 kgates can produce 1.2 digital signatures in a second for 2,048-bit key length with the power consumption of 6.8 mW.