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[Author] Kiyoshi YONEDA(6hit)

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  • A Comparison of Mean Value Analysis Approximation Algorithms

    Kiyoshi YONEDA  Shoichi KOJIMA  

     
    LETTER-Computer System

      Vol:
    E69-E No:5
      Page(s):
    593-596

    Variants of multiple chain mean value analysis algorithms are compared. Reiser's example of a communication system model is taken for a case study. Reiser's original comparison table between the exact MVA and Reiser's approximation is incremented by adding the population heuristic and the linearizer algorithm.

  • On a Preamble Size for FDDI- Network Distributed Clocking

    Kiyoshi YONEDA  Tatsuo KAJI  

     
    LETTER-Communication Networks

      Vol:
    E69-E No:11
      Page(s):
    1157-1160

    A distributed clocking scheme for ANSI FDDI- is considered. To compensate for clock variability, a frame proceeding through a series of stations has its preamble bits added or deleted. The necessary preamble size for stable operation is calculated, based on a Gumbel distribution fitted to a simulation result.

  • Percentile Delay Calculation for the Infinite Population Nonpersistent CSMA/CD

    Kiyoshi YONEDA  

     
    PAPER-Data Transmission

      Vol:
    E68-E No:6
      Page(s):
    371-375

    A model for computation of the transmission delay distribution in infinite population nonpersistent CSMA/CD is presented, together with computational approximations. Recent extensions of the use of CSMA/CD to heavy load realtime applications, such as packet voice communication and process control, motivated this work. The realtime condition demands quantiles of packet delay distributions, which in turn requires that the entire distribution be calculated rather than representative values such as mean delay and coefficient of variation. The model decomposes into two submodels describing channel state and delay distribution, respectively. The channel model is of infinite population justifying the assumption that the channel behavior affects an individual station's behavior, whereas the converse does not take place. The formulation is by discrete time Markov chain; time is grained into slots or backoff unit time. An arbitrary packet size distribution is allowed. The solution is obtained in closed form; measures such as throughput and probability of trial success are also available in closed form. The delay model assumes that channel access trials are independent of each other; the calculation consists of convolutions and weighted sum of distributions. Because this computation is rather heavy, approximations are included.

  • Diffusion of Phosphorus in Poly/Single Crystalline Silicon

    Hideaki FUJIWARA  Hideharu NAGASAWA  Atsuhiro NISHIDA  Koji SUZUKI  Kazunobu MAMENO  Kiyoshi YONEDA  

     
    PAPER

      Vol:
    E75-C No:9
      Page(s):
    995-1000

    Diffusion of phosphorus impurities from a polycrystalline silicon films into a silicon substrate was investigated as a function of the mean concentration of phosphorus in a polycrystalline silicon film at the first diffusion stage. We presented that good control of the redistribution of implanted phosphorus impurities was possible by optimizing the normalized dose, which is the value: [the total dose of phosphorus impurities]/[the polycrystalline silicon film thickness], in the case of samples both with and without an arsenic doped layers. In the range where the normalized dose was less than 1.52.51020 cm-3, deeper junctions were formed in samples with an arsenic doped layer. In the range where the normalized dose was more than 1.52.51020 cm-3, however, deeper junctions were formed in samples without any arsenic doped layer rather than in samples with an arsenic doped layer. These results mean that formation of the junction in the device structure where a high concentration phosphorus doped polysilicon layer is stacked on to the high concentration arsenic layer embeded at the surface of the substrate can be restricted by optimizing the normalized dose. Moreover, a trade-off relationship between suppressing phosphorus diffusion and maintaining low contact resistance against normalized doses was also observed.

  • Half-Micron LOCOS Isolation Using High Energy Ion Implantation

    Koji SUZUKI  Kazunobu MAMENO  Hideharu NAGASAWA  Atsuhiro NISHIDA  Hideaki FUJIWARA  Kiyoshi YONEDA  

     
    PAPER

      Vol:
    E75-C No:9
      Page(s):
    972-977

    A new channel stop design for submicton local oxidation of silicon (LOCOS) isolation was presented. The n-channel stop was designed with boron implanation after forming LOCOS, while the p-channel stop was constructed with high energy phosphorus or arsenic implantation before or after forming LOCOS. These optimized channel stop designs can extend an isolation spacing to the submicron region without a decrease in junction breakdown voltage and an increase in junction leakage current. Narrow channel effects were found to be effectively suppressed by optimum channel stop design issues.

  • Elimination of Negative Charge-Up during High Current Ion Implantation

    Kazunobu MAMENO  Atsuhiro NISHIDA  Hideharu NAGASAWA  Hideaki FUJIWARA  Koji SUZUKI  Kiyoshi YONEDA  

     
    PAPER-Process Technology

      Vol:
    E77-C No:3
      Page(s):
    459-463

    The dielectric breakdown characteristics of a thin gate oxide during high-current ion implantation with an electron shower have been investigated by controlling the energy distribution of the electrons. Degradation of the oxide has also been discussed with regard to the total charge injected into the oxide during ion implantation in comparison with that of the TDDB (time dependent dielectric breakdown). Experimental results show that the high-energy and high-density electrons which concentrated in the circumference of the ion beam due to the space charge effect cause the degradation of the thin oxide. It was confirmed that eliminating the high-energy electrons by applying magnetic and electric fields lowers the electron energy at the wafer surface, thereby effectively suppressing the negative charge-up.