IEICE TRANSACTIONS on Electronics
Half-Micron LOCOS Isolation Using High Energy Ion Implantation
Summary :
A new channel stop design for submicton local oxidation of silicon (LOCOS) isolation was presented. The n-channel stop was designed with boron implanation after forming LOCOS, while the p-channel stop was constructed with high energy phosphorus or arsenic implantation before or after forming LOCOS. These optimized channel stop designs can extend an isolation spacing to the submicron region without a decrease in junction breakdown voltage and an increase in junction leakage current. Narrow channel effects were found to be effectively suppressed by optimum channel stop design issues.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E75-C No.9 pp.972-977
- Publication Date
- 1992/09/25
- Publicized
- Online ISSN
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- Type of Manuscript
- Special Section PAPER (Special Issue on Silicon Devices and Materials)
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Koji SUZUKI, Kazunobu MAMENO, Hideharu NAGASAWA, Atsuhiro NISHIDA, Hideaki FUJIWARA, Kiyoshi YONEDA, "Half-Micron LOCOS Isolation Using High Energy Ion Implantation" in IEICE TRANSACTIONS on Electronics,
vol. E75-C, no. 9, pp. 972-977, September 1992, doi: .
Abstract: A new channel stop design for submicton local oxidation of silicon (LOCOS) isolation was presented. The n-channel stop was designed with boron implanation after forming LOCOS, while the p-channel stop was constructed with high energy phosphorus or arsenic implantation before or after forming LOCOS. These optimized channel stop designs can extend an isolation spacing to the submicron region without a decrease in junction breakdown voltage and an increase in junction leakage current. Narrow channel effects were found to be effectively suppressed by optimum channel stop design issues.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e75-c_9_972/_p
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@ARTICLE{e75-c_9_972,
author={Koji SUZUKI, Kazunobu MAMENO, Hideharu NAGASAWA, Atsuhiro NISHIDA, Hideaki FUJIWARA, Kiyoshi YONEDA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Half-Micron LOCOS Isolation Using High Energy Ion Implantation},
year={1992},
volume={E75-C},
number={9},
pages={972-977},
abstract={A new channel stop design for submicton local oxidation of silicon (LOCOS) isolation was presented. The n-channel stop was designed with boron implanation after forming LOCOS, while the p-channel stop was constructed with high energy phosphorus or arsenic implantation before or after forming LOCOS. These optimized channel stop designs can extend an isolation spacing to the submicron region without a decrease in junction breakdown voltage and an increase in junction leakage current. Narrow channel effects were found to be effectively suppressed by optimum channel stop design issues.},
keywords={},
doi={},
ISSN={},
month={September},}
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TY - JOUR
TI - Half-Micron LOCOS Isolation Using High Energy Ion Implantation
T2 - IEICE TRANSACTIONS on Electronics
SP - 972
EP - 977
AU - Koji SUZUKI
AU - Kazunobu MAMENO
AU - Hideharu NAGASAWA
AU - Atsuhiro NISHIDA
AU - Hideaki FUJIWARA
AU - Kiyoshi YONEDA
PY - 1992
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E75-C
IS - 9
JA - IEICE TRANSACTIONS on Electronics
Y1 - September 1992
AB - A new channel stop design for submicton local oxidation of silicon (LOCOS) isolation was presented. The n-channel stop was designed with boron implanation after forming LOCOS, while the p-channel stop was constructed with high energy phosphorus or arsenic implantation before or after forming LOCOS. These optimized channel stop designs can extend an isolation spacing to the submicron region without a decrease in junction breakdown voltage and an increase in junction leakage current. Narrow channel effects were found to be effectively suppressed by optimum channel stop design issues.
ER -
English
