A high speed, 4 K word by one bit static Random Access Memory (RAM) has been developed, using Diffusion Self-Aligned (DSA) MOS technology. High speed and low power operation was achieved by combining the following refined devices and new circuit technology; high gain DSA MOS FETs as drivers, Reverse DSA (RDSA) MOS FETs with low threshold voltage (VTAR0 V) as power reduction switches, full wave rectifier substrate bias generator and dual X-decoder circuits. The present RAM operates on a single 51 V external power supply. Its typical performances are; 28 ns chip enable access time (CL33 pF), 300 mW active power dissipation and 50 mW stand-by power dissipation.