An FPGA plays an essential role in industrial products due to its fast, stable and flexible features. But the power consumption of FPGAs used in portable devices is one of critical issues. Top-down hierarchical design method is commonly used in both ASIC and FPGA design. But, in the case where plural modules are integrated in an FPGA and some of them might be in sleep-mode, current FPGA architecture cannot be fully effective. In this paper, coarse-grained power gating FPGA architecture is proposed where a whole area of an FPGA is partitioned into several regions and power supply is controlled for each region, so that modules in sleep mode can be effectively power-off. We also propose a region oriented FPGA placement algorithm fitted to this user's hierarchical design based on VPR [1]. Simulation results show that this proposed method could reduce power consumption of FPGA by 38% on average by setting unused modules or regions in sleep mode.

Since the power consumption of FPGA is larger than that of ASIC under the condition to perform the same function using the same scaling, the application of FPGA is limited especially in portable electronic devices. In this paper, we propose a novel low-power FPGA architecture based on coarse-grained power gating to reduce power consumption. The new placement algorithm and routing resource graph for sleep regions is also presented. After enhancing the CAD framework, a detailed discussion is given under different region size supported by the new FPGA architecture. As a result, our proposed FPGA architecture combined with the new placement and routing algorithm can reduce 19.4% in the total power consumption compared with the traditional FPGA. By using our proposed method, FPGA is promising to be widely applied to portable devices.

Dynamic power gating applicable to FPGA can reduce the power consumption effectively. In this paper, we propose a sophisticated routing architecture for a region oriented FPGA which supports dynamic power gating. This is the first routing solution of dynamic power gating for coarse-grained FPGA. This paper has 2 main contributions. First, it improves the routing resource graph and routing architecture to support special routing for a region oriented FPGA. Second, some routing channels are made wider to avoid congestion. Experimental result shows that 7.7% routing area can be reduced compared with the symmetric Wilton switch box in the region. Also, our proposed FPGA architecture with sophisticated P&R can reduce the power consumption of the system implemented in FPGA.

Locator/ID Separation Protocol (LISP) is an efficient proposal for solving the severe routing scalability problems existing in the current IPv4-based Internet and the future IPv6-based Internet. However, the basic LISP architecture does not specify how to support mobility in detail. As mobility is a fundamental issue faced by the future Internet, LISP mobility architecture (LISP-MN) was proposed recently to extend LISP to support mobility. Nevertheless, LISP-MN is a host-based mobility approach which requires software changes in end systems. To some extent, such a design breaks the primary design principles of LISP, which is a network-based protocol and requires no modification to the hosts. In addition, LISP-MN faces the same inherent problems as other host-based approaches (e.g., MIPv4, MIPv6), such as handover latency, packet loss, and signalling overhead. To solve the above problems, this paper proposes MobileID, which is a network-based localized mobility approach for LISP. In our design, a mobile node is not aware of its mobility and does not participate in handover signalling. Instead, the network takes the responsibility for managing mobility on behalf of the mobile node. We present a general overview of MobileID architecture, and introduce the detailed protocol operations in terms of the basic MobileID handover process and the route optimization procedures. Furthermore, we describe a MobileID analytic model, and compare MobileID handover performance with three representative mobility solutions, i.e., LISP-MN, MIPv6 and PMIPv6. Numerical results show the superior performance of MobileID. The handover latency of MobileID is much lower than those of LISP-MN and MIPv6, and it becomes lower than that of PMIPv6 in case of a long wireless link delay.