A Unique word-line voltage control method for the 64-Mb DRAM and beyond, which realizes a constant lifetime for thin gate oxide, is proposed. This method controls word-line voltage and compensates reliability degradation in the thin gate oxide for cell-transfer transistors. It keeps constant time-dependent dielectric breakdown (TDDB) lifetime, under any conditions concerning gate oxide thickness fluctuation, temperature variation, and supply voltage variation. This method was successfully implemented in a 64-Mb DRAM to realize high reliability. This chip achieved a 105 times reliability improvement, or a 0.3 1.8-V larger word-line voltage margin to write ONE data into the cell.