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Atsushi KAMO Hiroshi NINOMIYA Teru YONEYAMA Hideki ASAI
This paper describes an efficient simulator for state transition analysis of multivalued continuous-time neural networks, where the multivalued transfer function of neuron is regarded as a stepwise constant one. Use of stepwise constant method enables to analyse the state transition of the network without solving explicitly the differential equations. This method also enables to select the optimal timestep in numerical integration. The proposed method is implemented on the simulator and applied to the general neural network analysis. Furthermore, this is compared with the conventional simulators. Finally, it is shown that our simulator is drastically faster and more practical than the conventional simulators.
Tsutomu SUZUKI Takao OURA Teru YONEYAMA Hideki ASAI
A new four-quadrant (4Q) Multiplier complementally using linear and saturation regions of MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is proposed for the wide dynamic range and superior flexibility of the input range. This multiplier operates in the region except for the threshold voltage VT to zero. The validity of the proposed circuit is confirmed through HSPICE simulation.
Shashidhar TANTRY Yasuyuki HIRAKU Takao OURA Teru YONEYAMA Hideki ASAI
In this paper, we propose a floating resistor circuit with positive and negative resistance operating at the low supply voltages 1.5 V. Only two transistors are connected between supply lines in order to operate under the low power supply voltages. In this circuit, current subtraction is carried out at the gate terminal for which input/output voltage is applied. As a result, the proposed circuit can realize the large range of resistance of positive and negative resistances. Therefore, in an application, the proposed circuit is used in neuro-based limit cycle generator as synaptic weights.
Teru YONEYAMA Hiroshi NINOMIYA Hideki ASAI
In this report, a design method of neural networks for limit cycle generator is described. First, the constraint conditions for the synaptic weights, which are given by the linear inequalities, are derived from the dynamics of neural networks. Next, the linear inequalities are solved by the linear programming method. The synaptic weights and other parameters are determined by the above solutions. Furthermore, neuro-based limit cycle generator is designed with analog electronic circuits and simulated by Spice. Finally, we confirm that our design method is efficient and practical for the design of neuro-based limit cycle generator.
Takao OURA Teru YONEYAMA Shashidhar TANTRY Hideki ASAI
In this report, we propose a new bilateral floating resistor circuit having both positive and negative resistance values. The equivalent resistance of this floating resistor in CMOS technology can be changed by using controlled-voltages, which is an advantage over polysilicon or diffused resistor in the integrated circuit. Moreover the characteristics of the proposed circuit are independent of the threshold voltage. We have simulated the proposed circuit by using HSPICE. Finally, we have confirmed that the proposed circuit is useful as an analog component.
Hiroshi NINOMIYA Atsushi KAMO Teru YONEYAMA Hideki ASAI
This paper describes an efficient simulation algorithm for the spatiotemporal pattern analysis of the continuous-time neural networks with the multivalued logic (multivalued continuous-time neural networks). The multivalued transfer function of neuron is approximated to the stepwise constant function which is constructed by the sum of the step functions with the different thresholds. By this approximation, the dynamics of the network can be formulated as a stepwise constant linear differential equation at each timestep and the optimal timestep for the numerical integration can be obtained analytically. Finally, it is shown that the proposed method is much faster than a variety of conventional simulators.