In this paper, a novel 622 Mb/s burst-mode clock and data recovery (CDR) circuits with muxed oscillators are realized for passive optical network (PON) application. The CDR circuits are implemented with 0.35 µm CMOS process technology. Lock is accomplished on the first data transition and data are sampled at the optimal point. The experimental results show that the proposed CDR circuits recover the incoming 400-622 Mb/s burst mode input data without errors.

A new charge pump is proposed which provides improved jitter characteristics for a phase-locked loop (PLL). The PLL with the proposed charge pump is implemented with 0.6 µm CMOS technology. The measured RMS output jitter is as much as 28% smaller than that of a PLL with a previously reported charge pump structure.