Novel 622 Mb/s Burst-Mode Clock and Data Recovery Circuits with Muxed Oscillators
Summary :
In this paper, a novel 622 Mb/s burst-mode clock and data recovery (CDR) circuits with muxed oscillators are realized for passive optical network (PON) application. The CDR circuits are implemented with 0.35 µm CMOS process technology. Lock is accomplished on the first data transition and data are sampled at the optimal point. The experimental results show that the proposed CDR circuits recover the incoming 400-622 Mb/s burst mode input data without errors.
- Publication
- IEICE TRANSACTIONS on Communications Vol.E86-B No.11 pp.3288-3292
- Publication Date
- 2003/11/01
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- LETTER
- Category
- Communication Devices/Circuits
Authors
Keyword
burst-mode, PLL, CDR, PON
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Yu-Gun KIM, Chun-Oh LEE, Seung-Woo LEE, Hyun-Su CHAI, Hyun-Suk RYU, Woo-Young CHOI, "Novel 622 Mb/s Burst-Mode Clock and Data Recovery Circuits with Muxed Oscillators" in IEICE TRANSACTIONS on Communications,
vol. E86-B, no. 11, pp. 3288-3292, November 2003, doi: .
Abstract: In this paper, a novel 622 Mb/s burst-mode clock and data recovery (CDR) circuits with muxed oscillators are realized for passive optical network (PON) application. The CDR circuits are implemented with 0.35 µm CMOS process technology. Lock is accomplished on the first data transition and data are sampled at the optimal point. The experimental results show that the proposed CDR circuits recover the incoming 400-622 Mb/s burst mode input data without errors.
URL: https://global.ieice.org/en_transactions/communications/10.1587/e86-b_11_3288/_p
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@ARTICLE{e86-b_11_3288,
author={Yu-Gun KIM, Chun-Oh LEE, Seung-Woo LEE, Hyun-Su CHAI, Hyun-Suk RYU, Woo-Young CHOI, },
journal={IEICE TRANSACTIONS on Communications},
title={Novel 622 Mb/s Burst-Mode Clock and Data Recovery Circuits with Muxed Oscillators},
year={2003},
volume={E86-B},
number={11},
pages={3288-3292},
abstract={In this paper, a novel 622 Mb/s burst-mode clock and data recovery (CDR) circuits with muxed oscillators are realized for passive optical network (PON) application. The CDR circuits are implemented with 0.35 µm CMOS process technology. Lock is accomplished on the first data transition and data are sampled at the optimal point. The experimental results show that the proposed CDR circuits recover the incoming 400-622 Mb/s burst mode input data without errors.},
keywords={},
doi={},
ISSN={},
month={November},}
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TY - JOUR
TI - Novel 622 Mb/s Burst-Mode Clock and Data Recovery Circuits with Muxed Oscillators
T2 - IEICE TRANSACTIONS on Communications
SP - 3288
EP - 3292
AU - Yu-Gun KIM
AU - Chun-Oh LEE
AU - Seung-Woo LEE
AU - Hyun-Su CHAI
AU - Hyun-Suk RYU
AU - Woo-Young CHOI
PY - 2003
DO -
JO - IEICE TRANSACTIONS on Communications
SN -
VL - E86-B
IS - 11
JA - IEICE TRANSACTIONS on Communications
Y1 - November 2003
AB - In this paper, a novel 622 Mb/s burst-mode clock and data recovery (CDR) circuits with muxed oscillators are realized for passive optical network (PON) application. The CDR circuits are implemented with 0.35 µm CMOS process technology. Lock is accomplished on the first data transition and data are sampled at the optimal point. The experimental results show that the proposed CDR circuits recover the incoming 400-622 Mb/s burst mode input data without errors.
ER -
English
