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Yasuo UNEKAWA Tsuguo KOBAYASHI Tsukasa SHIROTORI Yukihiro FUJIMOTO Takayoshi SHIMAZAWA Kazutaka NOGAMI Takehiko NAKAO Kazuhiro SAWADA Masataka MATSUI Takayasu SAKURAI Man Kit TANG William A. HUFFMAN
A 4-way set associative TagRAM with 1.189-Mb capacity has been developed which can handle a secondary cache system of up to 16 Mbytes. A 9-ns cycle operation and clock to Dout of 4.7 ns are achieved by use of circuit techniques such as a pipelined decoding scheme, a single PMOS load BiCMOS main decoder, a BiCMOS sense-amplifying comparator, doubly placed self-timed write circuits, and highly linear VCO for a PLL. The device is successfully implemented with 0.7-µm double polysilicon double-metal BiCMOS technology.
Yukihiro FUJIMOTO Hisao OIKAWA
Telecommunication services are expected to be upgraded from POTS to B-ISDN services in the future. This means that the conventional metallic access networks should be upgraded to optical fiber access networks because of providing high bit-rate services. Therefore, it is very important to clarify upgrade strategies in access networks. This paper proposes a dynamic evaluation method that can support decision-making on the upgrade strategy from the viewpoint of economy. This method can determine the most promising future access network and upgrade timing. Moreover, viability of various upgrade strategies can be evaluated by this method.
Ryogo KUBO Jun-ichi KANI Yukihiro FUJIMOTO Naoto YOSHIMOTO Kiyomi KUMOZAKI
This paper proposes a power saving mechanism with variable sleep period to reduce the power consumed by optical network units (ONUs) in passive optical network (PON) systems. In the PON systems based on time division multiplexing (TDM), sleep and periodic wake-up (SPW) control is an effective ONU power saving technique. However, the effectiveness of SPW control is fully realized only if the sleep period changes in accordance with the traffic conditions. This paper proposes an SPW control mechanism with variable sleep period. The proposed mechanism sets the sleep period according to traffic conditions, which greatly improves the power saving effect. In addition, the protocols needed between an optical line terminal (OLT) and ONUs are described on the assumption that the proposed mechanism is applied to 10 Gigabit (10G) class PON systems, i.e. IEEE 802.3av 10G-EPON and FSAN/ITU-T 10G-PON systems. The validity of the proposed mechanism is confirmed by numerical simulations.
Tsuguo KOBAYASHI Kazutaka NOGAMI Tsukasa SHIROTORI Yukihiro FUJIMOTO
This paper describes two new power-saving schemes for high-performance VLSI's with a large-scale memory and many interface signals. One is a current-controlled latch sense amplifier that reduces the power dissipation by stopping sense current automatically. This sense amplifier reduces power without degrading access time compared with the conventional current-mirror sense amplifier. The other is a static power-saving input buffer (SPSIB) that reduces dc current in interface circuits receiving TTL-high input level. The effectiveness of these new circuits is demonstrated with a 512-kb high-speed SRAM.
A significant growth in FTTH access rates has been seen in the last year. This paper overviews the deployed FTTH access systems and the recent application of Ethernet technologies. The standardization activities and further study issues are also discussed.