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Shiro DOSHO Takashi MORIE Koji OKAMOTO Yuuji YAMADA Kazuaki SOGAWA
This paper describes a -90 dBc@10 kHz phase noise fractional-N frequency synthesizer of 110 M-180 MHz output with accurate loop bandwidth control. Stable phase noise characteristics are achieved by controlling the bandwidth correctly, even if the PLL uses a noisy but small ring oscillator. Digital controller adjusts voltage controlled oscillator (VCO) gain and time constant of the loop filter. Analog controller compensates temperature variance. Test chip fabricated on 0.13 µm CMOS process shows stable and 6.8 dB improvement of the phase noise performance is achieved against process and environmental variations.