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Boon-Khim LIEW Chih-Chiang WANG Carlos H. DIAZ Shien-Yang WU Jack Yuan-Chen SUN Yai-Fen LIN Di-Son KUO Hua-Tai LIN Anthony YEN
The application of Technology CAD simulations for development of IC processes in foundry is presented. Examples include device design, Flash cell design and optical proximity correction for SRAM cell. The challenges of using TCAD tools in the IC foundry is also discussed.
Kimio UEDA Yoshiki WADA Takanori HIROTA Shigenobu MAEDA Koichiro MASHIKO Hisanori HAMANO
This paper discusses the features of SOI/CMOS circuits in comparison with bulk/CMOS circuits. We have to design circuits with small fan outs and short wires to take advantage of high-speed and low-power SOI/CMOS devices to their fullest. We can take advantage of the SOI/CMOS structure if the ratio of the source/drain capacitances to the gate capacitances is much greater in the load capacitance. Thus, we propose a new flip-flop circuit with a smaller gate capacitance. The flip-flop circuit operates 30% faster than the previous circuit at 2.0 V. We also propose a buffer circuit having less delay disparity between the complementary output signals. The buffer circuit has the delay disparity of 18 ps at 0.2 pF and 2.0 V. We fabricated an 8-bit frequency divider and a 4-bit demultiplexer using the proposed circuits and 0.35 µm SOI/CMOS process. The 8-bit frequency divider and the 4-bit demultiplexer operate at 2.8 GHz and 1.6 GHz, respectively, at 2.0 V.
Hiroaki KANEKO Takashi MIYAZAKI Hideki SUGIMOTO
This paper describes a 16-bit microprocessor using circuit and process technology that realize static operation considering low-power consumption. The microprocessor so called V30HL achieved 4 times of performance per a unit power consumption as well as kept a complete software/hardware compatibility with standard 16-bit microprocessors. Also, the microprocessor operates in the range of DC-8 MHz for 2.7-5.5 V supply.
Alberto Palacios PAWLOVSKY Makoto HANAWA Osamu NISHII Tadahiko NISHIMUKAI
Advances in semiconductor technology have made it possible to develop an experimental 1000 MIPS superscalar RISC processor. The high performance of this processor was obtained using architectural concepts such as multiple CPU configuration, superscalar microarchitecture, and high-speed device technology. This paper focuses on the novel features of this RISC processor, its device technology, architectural characteristics and one technology that has been devised to make its integer CPU cores fault-tolerant.