1-1hit |
Kyoko TSUKANO Takahiro INOUE Shoichi KOGA Fumio UENO
A new CMOS neuron circuit suitable for VLSI implementation of artificial neural networks is proposed. A cross-coupled current comparator structure is adopted to obtain large differential neuron signals for high-speed multi-input/multi-output neuron operations. In addition, the shape of the output function of the proposed neuron circuit can be modified by simply varying the value of the auxiliary current sources. To estimate the performance of the proposed circuit as an element in a neural network, a 15-bit associative memory based on the Hopfield neural network was designed. The performances of a single 7-input neuron and of the 15-neuron associative memory are confirmed by SPICE simulations.