This paper proposes a low-power 100Gb/s four-level pulse amplitude modulation driver (PAM-4 Driver) based on linear distortion compensation structure for thin-film Lithium Niobate (LiNbO3) modulators, which manages to achieve high linearity in the output. The inductive peaking technology and open drain structure enable the overall circuit to achieve a 31-GHz bandwidth. With an area of 0.292 mm2, the proposed PAM-4 driver chip is designed in a 65-nm process to achieve power consumption of 37.7 mW. Post-layout simulation results show that the power efficiency is 0.37 mW/Gb/s, RLM is more than 96%, and the FOM value is 8.84.

To meet the increasing demand for high-speed communication in VLSI (very large-scale integration) systems, next-generation high-speed data transmission standards (e.g., IEEE 802.3bs and PCIe 6.0) will adopt four-level pulse amplitude modulation (PAM-4) for data coding. Although PAM-4 is spectrally efficient to mitigate inter-symbol interference caused by bandwidth-limited wired channels, it is more sensitive than conventional non-return-to-zero line coding. To evaluate the received signal quality when using adaptive coefficient settings for a PAM-4 equalizer during data transmission, we propose an eye-opening monitor technique based on machine learning. The proposed technique uses a Gaussian mixture model to classify the received PAM-4 symbols. Simulation and experimental results demonstrate the feasibility of adaptive equalization for PAM-4 coding.