In this paper, an analytical threshold voltage model of the strained gate-all-around MOSFET fabricated on the Si1-xGex virtual substrate is presented by solving the two-dimensional Poisson equation. The impact of key parameters such as the strain, channel length, gate oxide thickness and radius of the silicon cylinder on the threshold voltage has been investigated. It has been demonstrated that the threshold voltage decreases as the strain in the channel increases. The threshold voltage roll-off becomes severe when increasing the Ge content in the Si1-xGex virtual substrate. The model is found to tally well with the device simulator.

Electrical performances of gate-all-around (GAA) tunneling field-effect transistors (TFETs) based on a silicon germanium (Si1-xGex) layer have been investigated in terms of subthreshold swing (SS), on/off current ratio, on-state current (Ion). Cut-off frequency (fT) and maximum oscillation frequency (fmax) were demonstrated from small-signal parameters such as effective gate resistance (Rg), gate-drain capacitance (Cgd), and transconductance (gm). According to the technology computer-aided design (TCAD) simulation results, the current drivability, fT, and fmax of GAA TFETs based on Si1-xGex layer were higher than those of GAA TFETs based on silicon. The simulated devices had 60 nm channel length and 10 nm channel radius. A GAA TFET with x = 0.4 had maximum Ion of 51.4 µA/µm, maximum fT of 72 GHz, and maximum fmax of 610 GHz. Additionally, improvements of performance at the presented device with PNPN junctions were demonstrated in terms of Ion, SS, fT, and fmax. When the device was designed with x = 0.4 and n+ layer width (Wn) = 6 nm, it shows Ion of 271 µA/µm, fT of 245 GHz, and fmax of 1.49 THz at an operating bias (VGS = VDS = 1.0 V).